From patchwork Tue Apr 16 10:03:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Yang X-Patchwork-Id: 13631586 Received: from mail-pl1-f182.google.com (mail-pl1-f182.google.com [209.85.214.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0145986AFE; Tue, 16 Apr 2024 10:04:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713261897; cv=none; b=twdegp3KXDx0ovh+G8DfWw0z12589G+olMHAEq5iaHou5/rLq2JuxkzDFd6ouWTQHei1paqL0oL7KkLFazv8aebnVzfroafKNDVhUOIfDBb/rdBQ76AscKMjLKxCYmxNwBBxZmCJCLVh9Udp1I178zn+nBLR8IbtdLfpj27CYqE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713261897; c=relaxed/simple; bh=nFRMU6xTbrzOS51FDYFjCaA/OJfcz6/qg6Mj1TgIBms=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sN0W6/KZqCvWRaY9Lkt30GWChxIVfMCu4ndVYsoINnEM270oigCJ7CWOrrkt4H8Hhz5RMDuQ7bZqpPM+f+4KvNGVYgmc5OoIygqrNA2cS8dp3+PBOUAlabRa1jr+cEnOb7nG+oKzjzQ6Rmkx4yBWX/ioQeNmHdQfD1lnE2mFg5A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=C1yilRLL; arc=none smtp.client-ip=209.85.214.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="C1yilRLL" Received: by mail-pl1-f182.google.com with SMTP id d9443c01a7336-1e4c4fb6af3so23014815ad.0; Tue, 16 Apr 2024 03:04:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713261895; x=1713866695; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n8lUCW6/osKWYcttIWv//iPm23yYuW3M1dv6E9h9iCk=; b=C1yilRLLwrU/PaIuPMVqt5dGpwqphgaOFjOZ7Baa5fOCx09bX8PTsDKusvu41902ae rKzRo/MmXahOAsNvJNC6JC5yr8ZPuJRJVlryFJvzrTrcoV02TcIpqzDgQqzpuwQOwuTC wYEq51XHSxhblYVhJoAbb4Pg2QOX53Er1/ZibWbWxmotmOw3kp9qOVIY65985EJA2oiA GipsF17mI9hw9n2FQV0/QrIkzA7vc0lIbQ7INQVefWd+EGgRVaKAoW1ZyaFlJkcwm0fL RTzJGbMAzk7EgN4sBVuDToHiZlNe+oshm5pujvCIsVYUwuyLqQZVIQ7c8UkGWH+1flNE hhAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713261895; x=1713866695; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n8lUCW6/osKWYcttIWv//iPm23yYuW3M1dv6E9h9iCk=; b=Ynll+jorTgYagUgWoWs0yDPZDzcU+UM6OrKdZX5PNidroXHwjbrAbRbJp0a+j157k5 hTWGWcG1WMg17sZ5p9LGi2epcBJcZOmIucyLO2A/3ovNfFUEZZJ+lEMQErjhDcbcBulo zxtMTh0iT8kqTh3nDMsfpuCCn+9tUKiNuO4tXVI3DxZ219YODycB+Qs+fRtemqZ28Ewr Cl7WaLdrp/evQDek3sAbPEFwXuddBvoeDKZUxSZEt2apaP96ueix3oMTpYz7NxBLatRk jJw5i/wQL2oV6h28IwBB+WZ39o2dknNXH+KnuvsYt7gbSVSPyAITn0uVe2cCjyrCMcf1 M10g== X-Forwarded-Encrypted: i=1; AJvYcCWPR7m2Jkz9bxIrdg4O9QmxBCoJxbaSPaMFsuRhXdZMZ4OfzjxhYBKTpLrgXlMXpd0I5MrR0R6vDoTTJozWj8t5cSWSn23LwnpSHnMF X-Gm-Message-State: AOJu0YyhM9xlt80SkXpiSsTIiylUXBSzoDrHpbhYh5UH5XZGYoT80rUx w+2P1rmi99SCicgONkLjaW5qUrqpFTGR1lrpcCyPfmwl4zvs6rmtwB7fOETf X-Google-Smtp-Source: AGHT+IGvVlhwrGrkwKMmnsaPK2YW3X/FxGmutn2uMNmukH9HsqM2dP8O5b2YxgR0DfcfsDuKWL7LtQ== X-Received: by 2002:a17:902:bcc8:b0:1e5:5c5a:74ef with SMTP id o8-20020a170902bcc800b001e55c5a74efmr1725584pls.34.1713261894820; Tue, 16 Apr 2024 03:04:54 -0700 (PDT) Received: from d.home.yangfl.dn42 ([104.28.245.199]) by smtp.gmail.com with ESMTPSA id y4-20020a17090322c400b001e0b287c1d2sm9353651plg.215.2024.04.16.03.04.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Apr 2024 03:04:54 -0700 (PDT) From: David Yang To: linux-clk@vger.kernel.org Cc: Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, David Yang Subject: [PATCH v10 01/13] clk: hisilicon: Add helper functions for platform driver Date: Tue, 16 Apr 2024 18:03:35 +0800 Message-ID: <20240416100347.395295-2-mmyangfl@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240416100347.395295-1-mmyangfl@gmail.com> References: <20240416100347.395295-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Helper functions extract common operations on platform drivers. During migration to devm APIs, (virtual) fixed clocks were found hard on devm APIs, since they often depended by crucial peripherals, thus require early initialization before device probing, and cannot use devm APIs. One solution to this problem is to add a "fixed-clock" node to device tree, independent to clock device, and make those peripherals depend on that. However, there is also some devices that do use fixed clocks provided by drivers, for example clk-hi3660.c . To simplify codes, we migrate clocks of other types to devm APIs, while keep fixed clocks self-managed, alongside with struct hisi_clock_data, and remove devm-managed hisi_clock_data. hisi_clk_alloc() will be removed in the following patch. Signed-off-by: David Yang --- drivers/clk/hisilicon/clk.c | 157 ++++++++++++++++++++++++++++++++++ drivers/clk/hisilicon/clk.h | 46 +++++++++- drivers/clk/hisilicon/crg.h | 5 ++ drivers/clk/hisilicon/reset.c | 42 +++++++++ 4 files changed, 248 insertions(+), 2 deletions(-) diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c index 09368fd32bef..e50115f8e236 100644 --- a/drivers/clk/hisilicon/clk.c +++ b/drivers/clk/hisilicon/clk.c @@ -88,6 +88,25 @@ struct hisi_clock_data *hisi_clk_init(struct device_node *np, } EXPORT_SYMBOL_GPL(hisi_clk_init); +void hisi_clk_free(struct device_node *np, struct hisi_clock_data *data) +{ + if (data->clks) { + if (data->clks->fixed_rate_clks_num) + hisi_clk_unregister_fixed_rate(data->clks->fixed_rate_clks, + data->clks->fixed_rate_clks_num, + data); + if (data->clks->fixed_factor_clks_num) + hisi_clk_unregister_fixed_factor(data->clks->fixed_factor_clks, + data->clks->fixed_factor_clks_num, + data); + } + + of_clk_del_provider(np); + kfree(data->clk_data.clks); + kfree(data); +} +EXPORT_SYMBOL_GPL(hisi_clk_free); + int hisi_clk_register_fixed_rate(const struct hisi_fixed_rate_clock *clks, int nums, struct hisi_clock_data *data) { @@ -341,3 +360,141 @@ void __init hi6220_clk_register_divider(const struct hi6220_divider_clock *clks, data->clk_data.clks[clks[i].id] = clk; } } + +static size_t hisi_clocks_get_nr(const struct hisi_clocks *clks) +{ + if (clks->nr) + return clks->nr; + + return clks->fixed_rate_clks_num + clks->fixed_factor_clks_num + + clks->mux_clks_num + clks->phase_clks_num + + clks->divider_clks_num + clks->gate_clks_num + + clks->gate_sep_clks_num + clks->customized_clks_num; +} + +int hisi_clk_early_init(struct device_node *np, const struct hisi_clocks *clks) +{ + struct hisi_clock_data *data; + int ret; + + data = hisi_clk_init(np, hisi_clocks_get_nr(clks)); + if (!data) + return -ENOMEM; + data->clks = clks; + + ret = hisi_clk_register_fixed_rate(clks->fixed_rate_clks, + clks->fixed_rate_clks_num, data); + if (ret) + goto err; + + ret = hisi_clk_register_fixed_factor(clks->fixed_factor_clks, + clks->fixed_factor_clks_num, data); + if (ret) + goto err; + + np->data = data; + return 0; + +err: + hisi_clk_free(np, data); + return ret; +} +EXPORT_SYMBOL_GPL(hisi_clk_early_init); + +static int hisi_clk_register(struct device *dev, const struct hisi_clocks *clks, + struct hisi_clock_data *data) +{ + int ret; + + if (clks->mux_clks_num) { + ret = hisi_clk_register_mux(clks->mux_clks, + clks->mux_clks_num, data); + if (ret) + return ret; + } + + if (clks->phase_clks_num) { + ret = hisi_clk_register_phase(dev, clks->phase_clks, + clks->phase_clks_num, data); + if (ret) + return ret; + } + + if (clks->divider_clks_num) { + ret = hisi_clk_register_divider(clks->divider_clks, + clks->divider_clks_num, data); + if (ret) + return ret; + } + + if (clks->gate_clks_num) { + ret = hisi_clk_register_gate(clks->gate_clks, + clks->gate_clks_num, data); + if (ret) + return ret; + } + + if (clks->gate_sep_clks_num) { + hisi_clk_register_gate_sep(clks->gate_sep_clks, + clks->gate_sep_clks_num, data); + } + + if (clks->clk_register_customized && clks->customized_clks_num) { + ret = clks->clk_register_customized(dev, clks->customized_clks, + clks->customized_clks_num, data); + if (ret) + return ret; + } + + return 0; +} + +int hisi_clk_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + const struct hisi_clocks *clks; + struct hisi_clock_data *data; + int ret; + + clks = of_device_get_match_data(dev); + if (!clks) + return -ENOENT; + + if (!np->data) { + ret = hisi_clk_early_init(np, clks); + if (ret) + return ret; + } + + data = np->data; + np->data = NULL; + + if (clks->prologue) { + ret = clks->prologue(dev, data); + if (ret) + goto err; + } + + ret = hisi_clk_register(dev, clks, data); + if (ret) + goto err; + + platform_set_drvdata(pdev, data); + return 0; + +err: + hisi_clk_free(np, data); + return ret; +} +EXPORT_SYMBOL_GPL(hisi_clk_probe); + +void hisi_clk_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct hisi_clock_data *data = platform_get_drvdata(pdev); + + hisi_clk_free(np, data); +} +EXPORT_SYMBOL_GPL(hisi_clk_remove); diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h index 7a9b42e1b027..87b17e9b79a3 100644 --- a/drivers/clk/hisilicon/clk.h +++ b/drivers/clk/hisilicon/clk.h @@ -17,10 +17,12 @@ #include struct platform_device; +struct hisi_clocks; struct hisi_clock_data { - struct clk_onecell_data clk_data; - void __iomem *base; + struct clk_onecell_data clk_data; + void __iomem *base; + const struct hisi_clocks *clks; }; struct hisi_fixed_rate_clock { @@ -103,6 +105,39 @@ struct hisi_gate_clock { const char *alias; }; +struct hisi_clocks { + /* if 0, sum all *_num */ + size_t nr; + + int (*prologue)(struct device *dev, struct hisi_clock_data *data); + + const struct hisi_fixed_rate_clock *fixed_rate_clks; + size_t fixed_rate_clks_num; + + const struct hisi_fixed_factor_clock *fixed_factor_clks; + size_t fixed_factor_clks_num; + + const struct hisi_mux_clock *mux_clks; + size_t mux_clks_num; + + const struct hisi_phase_clock *phase_clks; + size_t phase_clks_num; + + const struct hisi_divider_clock *divider_clks; + size_t divider_clks_num; + + const struct hisi_gate_clock *gate_clks; + size_t gate_clks_num; + + const struct hisi_gate_clock *gate_sep_clks; + size_t gate_sep_clks_num; + + const void *customized_clks; + size_t customized_clks_num; + int (*clk_register_customized)(struct device *dev, const void *clks, + size_t num, struct hisi_clock_data *data); +}; + struct clk *hisi_register_clkgate_sep(struct device *, const char *, const char *, unsigned long, void __iomem *, u8, @@ -113,6 +148,7 @@ struct clk *hi6220_register_clkdiv(struct device *dev, const char *name, struct hisi_clock_data *hisi_clk_alloc(struct platform_device *, int); struct hisi_clock_data *hisi_clk_init(struct device_node *, int); +void hisi_clk_free(struct device_node *np, struct hisi_clock_data *data); int hisi_clk_register_fixed_rate(const struct hisi_fixed_rate_clock *, int, struct hisi_clock_data *); int hisi_clk_register_fixed_factor(const struct hisi_fixed_factor_clock *, @@ -154,4 +190,10 @@ hisi_clk_unregister(mux) hisi_clk_unregister(divider) hisi_clk_unregister(gate) +/* helper functions for platform driver */ + +int hisi_clk_early_init(struct device_node *np, const struct hisi_clocks *clks); +int hisi_clk_probe(struct platform_device *pdev); +void hisi_clk_remove(struct platform_device *pdev); + #endif /* __HISI_CLK_H */ diff --git a/drivers/clk/hisilicon/crg.h b/drivers/clk/hisilicon/crg.h index 803f6ba6d7a2..bd8e76b1f6d7 100644 --- a/drivers/clk/hisilicon/crg.h +++ b/drivers/clk/hisilicon/crg.h @@ -22,4 +22,9 @@ struct hisi_crg_dev { const struct hisi_crg_funcs *funcs; }; +/* helper functions for platform driver */ + +int hisi_crg_probe(struct platform_device *pdev); +void hisi_crg_remove(struct platform_device *pdev); + #endif /* __HISI_CRG_H */ diff --git a/drivers/clk/hisilicon/reset.c b/drivers/clk/hisilicon/reset.c index 93cee17db8b1..c7d4c9ea7183 100644 --- a/drivers/clk/hisilicon/reset.c +++ b/drivers/clk/hisilicon/reset.c @@ -6,11 +6,15 @@ */ #include +#include #include #include #include #include #include + +#include "clk.h" +#include "crg.h" #include "reset.h" #define HISI_RESET_BIT_MASK 0x1f @@ -116,3 +120,41 @@ void hisi_reset_exit(struct hisi_reset_controller *rstc) reset_controller_unregister(&rstc->rcdev); } EXPORT_SYMBOL_GPL(hisi_reset_exit); + +int hisi_crg_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct hisi_crg_dev *crg; + int ret; + + crg = devm_kmalloc(dev, sizeof(*crg), GFP_KERNEL); + if (!crg) + return -ENOMEM; + + ret = hisi_clk_probe(pdev); + if (ret) + return ret; + + crg->rstc = hisi_reset_init(pdev); + if (!crg->rstc) { + ret = -ENOMEM; + goto err; + } + + platform_set_drvdata(pdev, crg); + return 0; + +err: + hisi_clk_remove(pdev); + return ret; +} +EXPORT_SYMBOL_GPL(hisi_crg_probe); + +void hisi_crg_remove(struct platform_device *pdev) +{ + struct hisi_crg_dev *crg = platform_get_drvdata(pdev); + + hisi_reset_exit(crg->rstc); + hisi_clk_remove(pdev); +} +EXPORT_SYMBOL_GPL(hisi_crg_remove);