From patchwork Thu Dec 13 18:00:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 10732945 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 735476C5 for ; Mon, 17 Dec 2018 08:54:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 649DA29D69 for ; Mon, 17 Dec 2018 08:54:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 593AE29D83; Mon, 17 Dec 2018 08:54:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Flag: YES X-Spam-Level: ** X-Spam-Status: Yes, score=2.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW,RDNS_NONE,SORTED_RECIPS, SUSPICIOUS_RECIPS autolearn=no version=3.3.1 X-Spam-Report: * -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low * trust * [66.175.222.12 listed in list.dnswl.org] * -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% * [score: 0.0000] * 2.5 SUSPICIOUS_RECIPS Similar addresses in recipient list * 2.5 SORTED_RECIPS Recipient list is sorted by address * -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature * 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily * valid * -1.0 MAILING_LIST_MULTI Multiple indicators imply a widely-seen list * manager * 0.8 RDNS_NONE Delivered to internal network by a host with no rDNS Received: from web01.groups.io (unknown [66.175.222.12]) (using TLSv1.2 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BD14029D69 for ; Mon, 17 Dec 2018 08:54:58 +0000 (UTC) X-Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) by groups.io with SMTP; Thu, 13 Dec 2018 10:00:52 -0800 X-Received: from e0022681537dd.dyn.armlinux.org.uk ([2001:4d48:ad52:3201:222:68ff:fe15:37dd]:59198 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.90_1) (envelope-from ) id 1gXVHu-0003rz-Cm; Thu, 13 Dec 2018 18:00:42 +0000 X-Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1gXVHt-00088Q-DP; Thu, 13 Dec 2018 18:00:41 +0000 In-Reply-To: <20181213175952.GC26090@n2100.armlinux.org.uk> References: <20181213175952.GC26090@n2100.armlinux.org.uk> From: Russell King To: linux-arm-kernel@lists.infradead.org,linux-arm-msm@vger.kernel.org,linux-omap@vger.kernel.org,linux-oxnas@groups.io,linux-samsung-soc@vger.kernel.org,linux-soc@vger.kernel.org Cc: Tony Lindgren Subject: [linux-oxnas] [PATCH 1/9] ARM: omap2: remove unnecessary boot_lock MIME-Version: 1.0 Message-Id: Date: Thu, 13 Dec 2018 18:00:41 +0000 Precedence: Bulk List-Unsubscribe: Sender: linux-oxnas@groups.io List-Id: Mailing-List: list linux-oxnas@groups.io; contact linux-oxnas+owner@groups.io Delivered-To: mailing list linux-oxnas@groups.io Reply-To: linux-oxnas@groups.io,rmk+kernel@armlinux.org.uk Content-Disposition: inline DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1545036898; bh=WgT7prsCMp7bCiBLW9990/cOdX8vxe+bGFDqq11DO3A=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=uTR8bNtFvvFvdxYCnAJTJcGrXLrbfarascQsfbI/PFmZg8A2qd6DjxaEPGOtvM5/0fQ zNgqTCKZIgCWtxUsh0B+cbzUV0L+N6CtyScnP8ZDcFkDE7wcNrPO1tz81ZhG/HyXGyLiI ZfRzz1aUXKKF+6LkYIuAWsRy1x4/zbXCTlk= X-Virus-Scanned: ClamAV using ClamSMTP The boot_lock is something that was required for ARM development platforms to ensure that the delay calibration worked properly. This is not necessary for modern platforms that have better bus bandwidth and do not need to calibrate the delay loop for secondary cores. Remove the boot_lock entirely. Acked-by: Tony Lindgren Signed-off-by: Russell King --- arch/arm/mach-omap2/omap-smp.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 1c73694c871a..10e070368f64 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -69,8 +69,6 @@ static const struct omap_smp_config omap5_cfg __initconst = { .startup_addr = omap5_secondary_startup, }; -static DEFINE_SPINLOCK(boot_lock); - void __iomem *omap4_get_scu_base(void) { return cfg.scu_base; @@ -173,12 +171,6 @@ static void omap4_secondary_init(unsigned int cpu) /* Enable ACR to allow for ICUALLU workaround */ omap5_secondary_harden_predictor(); } - - /* - * Synchronise with the boot thread. - */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); } static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -188,12 +180,6 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) static struct powerdomain *cpu1_pwrdm; /* - * Set synchronisation state between this boot processor - * and the secondary one - */ - spin_lock(&boot_lock); - - /* * Update the AuxCoreBoot0 with boot state for secondary core. * omap4_secondary_startup() routine will hold the secondary core till * the AuxCoreBoot1 register is updated with cpu state @@ -266,12 +252,6 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) arch_send_wakeup_ipi_mask(cpumask_of(cpu)); - /* - * Now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ - spin_unlock(&boot_lock); - return 0; }