| Message ID | 1410175636-4036-2-git-send-email-ezequiel@vanguardiasur.com.ar (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Ezequiel, On 09/08/2014 02:27 PM, Ezequiel Garcia wrote: > This commit adds a new platform-data boolean property that enables use > of a flash-based bad block table. This can also be enabled by setting > the 'nand-on-flash-bbt' devicetree property. I'm not much aware of how on-flash-BBT works internally, but will it break things if we keep on-flash-BBT "enabled" as the default option and add a DT property only to explicitly disable the on-flash-BBT? > > If the flash BBT is not enabled, the driver falls back to use OOB > bad block markers only, as before. If the flash BBT is enabled the > kernel will keep track of bad blocks using a BBT, in addition to > the OOB markers. > > As explained by Brian Norris the reasons for using a BBT are: > > "" > The primary reason would be that NAND datasheets specify it these days. > A better argument is that nobody guarantees that you can write a > bad block marker to a worn out block; you may just get program failures. > > This has been acknowledged by several developers over the last several > years. > > Additionally, you get a boot-time performance improvement if you only > have to read a few pages, instead of a page or two from every block on > the flash. > "" cheers, -roger > > Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> > --- > arch/arm/mach-omap2/gpmc.c | 2 ++ > drivers/mtd/nand/omap2.c | 6 +++++- > include/linux/platform_data/mtd-nand-omap2.h | 1 + > 3 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c > index 2f97228..b55a225 100644 > --- a/arch/arm/mach-omap2/gpmc.c > +++ b/arch/arm/mach-omap2/gpmc.c > @@ -1440,6 +1440,8 @@ static int gpmc_probe_nand_child(struct platform_device *pdev, > break; > } > > + gpmc_nand_data->flash_bbt = of_get_nand_on_flash_bbt(child); > + > val = of_get_nand_bus_width(child); > if (val == 16) > gpmc_nand_data->devsize = NAND_BUSWIDTH_16; > diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c > index 5967b38..e1a9b31 100644 > --- a/drivers/mtd/nand/omap2.c > +++ b/drivers/mtd/nand/omap2.c > @@ -1663,7 +1663,6 @@ static int omap_nand_probe(struct platform_device *pdev) > mtd->owner = THIS_MODULE; > nand_chip = &info->nand; > nand_chip->ecc.priv = NULL; > - nand_chip->options |= NAND_SKIP_BBTSCAN; > > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > nand_chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res); > @@ -1692,6 +1691,11 @@ static int omap_nand_probe(struct platform_device *pdev) > nand_chip->chip_delay = 50; > } > > + if (pdata->flash_bbt) > + nand_chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; > + else > + nand_chip->options |= NAND_SKIP_BBTSCAN; > + > /* scan NAND device connected to chip controller */ > nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16; > if (nand_scan_ident(mtd, 1, NULL)) { > diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h > index 16ec262..090bbab 100644 > --- a/include/linux/platform_data/mtd-nand-omap2.h > +++ b/include/linux/platform_data/mtd-nand-omap2.h > @@ -71,6 +71,7 @@ struct omap_nand_platform_data { > struct mtd_partition *parts; > int nr_parts; > bool dev_ready; > + bool flash_bbt; > enum nand_io xfer_type; > int devsize; > enum omap_ecc ecc_opt; > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 09 Sep 11:35 AM, Roger Quadros wrote: > Ezequiel, > > On 09/08/2014 02:27 PM, Ezequiel Garcia wrote: > > This commit adds a new platform-data boolean property that enables use > > of a flash-based bad block table. This can also be enabled by setting > > the 'nand-on-flash-bbt' devicetree property. > > I'm not much aware of how on-flash-BBT works internally, but will it break things if > we keep on-flash-BBT "enabled" as the default option and add a DT property only to > explicitly disable the on-flash-BBT? > No, that wouldn't work because the DT property already exists and it works to enable the flash BBT when it's present. Documentation/devicetree/bindings/mtd/nand.txt Of course, we can add a new no-nand-on-flash-bbt, but I really don't see the point. Users can just put the property in all the devicetree board files where it's needed. And moreover, I don't want to change the default behavior of the driver; it's better to allow to *add* a new feature, if such feature is desired. Otherwise, users with some data in a flash's last blocks would be wiped and replaced with the BBT.
On 09/09/2014 04:27 PM, Ezequiel Garcia wrote: > On 09 Sep 11:35 AM, Roger Quadros wrote: >> Ezequiel, >> >> On 09/08/2014 02:27 PM, Ezequiel Garcia wrote: >>> This commit adds a new platform-data boolean property that enables use >>> of a flash-based bad block table. This can also be enabled by setting >>> the 'nand-on-flash-bbt' devicetree property. >> >> I'm not much aware of how on-flash-BBT works internally, but will it break things if >> we keep on-flash-BBT "enabled" as the default option and add a DT property only to >> explicitly disable the on-flash-BBT? >> > > No, that wouldn't work because the DT property already exists and it works to > enable the flash BBT when it's present. > > Documentation/devicetree/bindings/mtd/nand.txt > > Of course, we can add a new no-nand-on-flash-bbt, but I really don't see the > point. Users can just put the property in all the devicetree board files where > it's needed. > > And moreover, I don't want to change the default behavior of the driver; it's > better to allow to *add* a new feature, if such feature is desired. > Otherwise, users with some data in a flash's last blocks would be wiped and > replaced with the BBT. > OK. Let's stick with your patch then. cheers, -roger -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 2f97228..b55a225 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1440,6 +1440,8 @@ static int gpmc_probe_nand_child(struct platform_device *pdev, break; } + gpmc_nand_data->flash_bbt = of_get_nand_on_flash_bbt(child); + val = of_get_nand_bus_width(child); if (val == 16) gpmc_nand_data->devsize = NAND_BUSWIDTH_16; diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 5967b38..e1a9b31 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1663,7 +1663,6 @@ static int omap_nand_probe(struct platform_device *pdev) mtd->owner = THIS_MODULE; nand_chip = &info->nand; nand_chip->ecc.priv = NULL; - nand_chip->options |= NAND_SKIP_BBTSCAN; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); nand_chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res); @@ -1692,6 +1691,11 @@ static int omap_nand_probe(struct platform_device *pdev) nand_chip->chip_delay = 50; } + if (pdata->flash_bbt) + nand_chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; + else + nand_chip->options |= NAND_SKIP_BBTSCAN; + /* scan NAND device connected to chip controller */ nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16; if (nand_scan_ident(mtd, 1, NULL)) { diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h index 16ec262..090bbab 100644 --- a/include/linux/platform_data/mtd-nand-omap2.h +++ b/include/linux/platform_data/mtd-nand-omap2.h @@ -71,6 +71,7 @@ struct omap_nand_platform_data { struct mtd_partition *parts; int nr_parts; bool dev_ready; + bool flash_bbt; enum nand_io xfer_type; int devsize; enum omap_ecc ecc_opt;
This commit adds a new platform-data boolean property that enables use of a flash-based bad block table. This can also be enabled by setting the 'nand-on-flash-bbt' devicetree property. If the flash BBT is not enabled, the driver falls back to use OOB bad block markers only, as before. If the flash BBT is enabled the kernel will keep track of bad blocks using a BBT, in addition to the OOB markers. As explained by Brian Norris the reasons for using a BBT are: "" The primary reason would be that NAND datasheets specify it these days. A better argument is that nobody guarantees that you can write a bad block marker to a worn out block; you may just get program failures. This has been acknowledged by several developers over the last several years. Additionally, you get a boot-time performance improvement if you only have to read a few pages, instead of a page or two from every block on the flash. "" Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> --- arch/arm/mach-omap2/gpmc.c | 2 ++ drivers/mtd/nand/omap2.c | 6 +++++- include/linux/platform_data/mtd-nand-omap2.h | 1 + 3 files changed, 8 insertions(+), 1 deletion(-)