diff mbox

[RFC,1/6] drm/i915: Modifying structures related to DRRS

Message ID 1410543789-10815-2-git-send-email-vandana.kannan@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

vandana.kannan@intel.com Sept. 12, 2014, 5:43 p.m. UTC 
Moving around and changing some data related to DRRS to support
DRRS based on frontbuffer tracking in the following patches

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h  | 32 ++++++++++++++++++-------
 drivers/gpu/drm/i915/intel_dp.c  | 51 ++++++++++++++++++----------------------
 drivers/gpu/drm/i915/intel_drv.h | 18 --------------
 3 files changed, 47 insertions(+), 54 deletions(-)

Comments

Daniel Vetter Sept. 23, 2014, 8:41 a.m. UTC | #1 
On Fri, Sep 12, 2014 at 11:13:04PM +0530, Vandana Kannan wrote:
> Moving around and changing some data related to DRRS to support
> DRRS based on frontbuffer tracking in the following patches
> 
> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>

The commit message is a bit too sparse imo. You shouldn't just describe
what you change (the diff should make that clear), but much more important
is why you make these changes.

Here the big thing seems to be to move the drrs data from struct intel_dp
to the global dev_priv so that you can access it from non-kms code. Which
we need to be able to since the frontbuffer tracking code gets also called
from GEM functions.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.h  | 32 ++++++++++++++++++-------
>  drivers/gpu/drm/i915/intel_dp.c  | 51 ++++++++++++++++++----------------------
>  drivers/gpu/drm/i915/intel_drv.h | 18 --------------
>  3 files changed, 47 insertions(+), 54 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 241b2bf..1713bb9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -680,11 +680,33 @@ struct i915_fbc {
>  	} no_fbc_reason;
>  };
>  
> -struct i915_drrs {
> -	struct intel_connector *connector;
> +/**
> + * HIGH_RR is the highest eDP panel refresh rate read from EDID
> + * LOW_RR is the lowest eDP panel refresh rate found from EDID
> + * parsing for same resolution.
> + */
> +enum drrs_refresh_rate_type {
> +	DRRS_HIGH_RR,
> +	DRRS_LOW_RR,
> +	DRRS_MAX_RR, /* RR count */
> +};
> +
> +enum drrs_support_type {
> +	DRRS_NOT_SUPPORTED = 0,
> +	STATIC_DRRS_SUPPORT = 1,
> +	SEAMLESS_DRRS_SUPPORT = 2
>  };
>  
>  struct intel_dp;
> +struct i915_drrs {
> +	struct mutex mutex;
> +	struct delayed_work work;
> +	struct intel_dp *dp;
> +	unsigned busy_frontbuffer_bits;
> +	enum drrs_refresh_rate_type refresh_rate_type;
> +	enum drrs_support_type type;
> +};
> +
>  struct i915_psr {
>  	struct mutex lock;
>  	bool sink_support;
> @@ -1290,12 +1312,6 @@ struct ddi_vbt_port_info {
>  	uint8_t supports_dp:1;
>  };
>  
> -enum drrs_support_type {
> -	DRRS_NOT_SUPPORTED = 0,
> -	STATIC_DRRS_SUPPORT = 1,
> -	SEAMLESS_DRRS_SUPPORT = 2
> -};
> -
>  struct intel_vbt_data {
>  	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
>  	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index ab7cd0a..be9d90d 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1139,7 +1139,7 @@ found:
>  			       &pipe_config->dp_m_n);
>  
>  	if (intel_connector->panel.downclock_mode != NULL &&
> -		intel_dp->drrs_state.type == SEAMLESS_DRRS_SUPPORT) {
> +		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
>  			pipe_config->has_drrs = true;
>  			intel_link_compute_m_n(bpp, lane_count,
>  				intel_connector->panel.downclock_mode->clock,
> @@ -4794,24 +4794,24 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
>  		      I915_READ(pp_div_reg));
>  }
>  
> -void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
> +static void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_encoder *encoder;
> -	struct intel_dp *intel_dp = NULL;
> +	struct intel_digital_port *dig_port = NULL;
> +	struct intel_dp *intel_dp = dev_priv->drrs.dp;
>  	struct intel_crtc_config *config = NULL;
>  	struct intel_crtc *intel_crtc = NULL;
> -	struct intel_connector *intel_connector = dev_priv->drrs.connector;
>  	u32 reg, val;
> -	enum edp_drrs_refresh_rate_type index = DRRS_HIGH_RR;
> +	enum drrs_refresh_rate_type index = DRRS_HIGH_RR;
>  
>  	if (refresh_rate <= 0) {
>  		DRM_DEBUG_KMS("Refresh rate should be positive non-zero.\n");
>  		return;
>  	}
>  
> -	if (intel_connector == NULL) {
> -		DRM_DEBUG_KMS("DRRS supported for eDP only.\n");
> +	if (intel_dp == NULL) {
> +		DRM_DEBUG_KMS("DRRS not supported.\n");
>  		return;
>  	}
>  
> @@ -4825,8 +4825,8 @@ void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
>  		return;
>  	}
>  
> -	encoder = intel_attached_encoder(&intel_connector->base);
> -	intel_dp = enc_to_intel_dp(&encoder->base);
> +	dig_port = dp_to_dig_port(intel_dp);
> +	encoder = &dig_port->base;
>  	intel_crtc = encoder->new_crtc;
>  
>  	if (!intel_crtc) {
> @@ -4836,15 +4836,16 @@ void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
>  
>  	config = &intel_crtc->config;
>  
> -	if (intel_dp->drrs_state.type < SEAMLESS_DRRS_SUPPORT) {
> +	if (dev_priv->drrs.type < SEAMLESS_DRRS_SUPPORT) {
>  		DRM_DEBUG_KMS("Only Seamless DRRS supported.\n");
>  		return;
>  	}
>  
> -	if (intel_connector->panel.downclock_mode->vrefresh == refresh_rate)
> +	if (intel_dp->attached_connector->panel.downclock_mode->vrefresh ==
> +								refresh_rate)
>  		index = DRRS_LOW_RR;
>  
> -	if (index == intel_dp->drrs_state.refresh_rate_type) {
> +	if (index == dev_priv->drrs.refresh_rate_type) {
>  		DRM_DEBUG_KMS(
>  			"DRRS requested for previously set RR...ignoring\n");
>  		return;
> @@ -4873,24 +4874,21 @@ void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
>  	 * in future when idleness detection based DRRS in kernel and
>  	 * possible calls from user space to set differnt RR are made.
>  	 */
> +	mutex_lock(&dev_priv->drrs.mutex);
>  
> -	mutex_lock(&intel_dp->drrs_state.mutex);
> +	dev_priv->drrs.refresh_rate_type = index;
>  
> -	intel_dp->drrs_state.refresh_rate_type = index;
> -
> -	mutex_unlock(&intel_dp->drrs_state.mutex);
> +	mutex_unlock(&dev_priv->drrs.mutex);
>  
>  	DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate);
>  }
>  
>  static struct drm_display_mode *
> -intel_dp_drrs_init(struct intel_digital_port *intel_dig_port,
> -			struct intel_connector *intel_connector,
> -			struct drm_display_mode *fixed_mode)
> +intel_dp_drrs_init(struct intel_connector *intel_connector,
> +		   struct drm_display_mode *fixed_mode)
>  {
>  	struct drm_connector *connector = &intel_connector->base;
> -	struct intel_dp *intel_dp = &intel_dig_port->dp;
> -	struct drm_device *dev = intel_dig_port->base.base.dev;
> +	struct drm_device *dev = connector->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct drm_display_mode *downclock_mode = NULL;
>  
> @@ -4912,13 +4910,11 @@ intel_dp_drrs_init(struct intel_digital_port *intel_dig_port,
>  		return NULL;
>  	}
>  
> -	dev_priv->drrs.connector = intel_connector;
> -
> -	mutex_init(&intel_dp->drrs_state.mutex);
> +	mutex_init(&dev_priv->drrs.mutex);
>  
> -	intel_dp->drrs_state.type = dev_priv->vbt.drrs_type;
> +	dev_priv->drrs.type = dev_priv->vbt.drrs_type;
>  
> -	intel_dp->drrs_state.refresh_rate_type = DRRS_HIGH_RR;
> +	dev_priv->drrs.refresh_rate_type = DRRS_HIGH_RR;
>  	DRM_DEBUG_KMS("seamless DRRS supported for eDP panel.\n");
>  	return downclock_mode;
>  }
> @@ -4969,7 +4965,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
>  	struct drm_display_mode *scan;
>  	struct edid *edid;
>  
> -	intel_dp->drrs_state.type = DRRS_NOT_SUPPORTED;
> +	dev_priv->drrs.type = DRRS_NOT_SUPPORTED;
>  
>  	if (!is_edp(intel_dp))
>  		return true;
> @@ -5018,7 +5014,6 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
>  		if ((scan->type & DRM_MODE_TYPE_PREFERRED)) {
>  			fixed_mode = drm_mode_duplicate(dev, scan);
>  			downclock_mode = intel_dp_drrs_init(
> -						intel_dig_port,
>  						intel_connector, fixed_mode);
>  			break;
>  		}
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 07ce046..5b613e0 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -531,17 +531,6 @@ struct intel_hdmi {
>  struct intel_dp_mst_encoder;
>  #define DP_MAX_DOWNSTREAM_PORTS		0x10
>  
> -/**
> - * HIGH_RR is the highest eDP panel refresh rate read from EDID
> - * LOW_RR is the lowest eDP panel refresh rate found from EDID
> - * parsing for same resolution.
> - */
> -enum edp_drrs_refresh_rate_type {
> -	DRRS_HIGH_RR,
> -	DRRS_LOW_RR,
> -	DRRS_MAX_RR, /* RR count */
> -};
> -
>  struct intel_dp {
>  	uint32_t output_reg;
>  	uint32_t aux_ch_ctl_reg;
> @@ -596,12 +585,6 @@ struct intel_dp {
>  				     bool has_aux_irq,
>  				     int send_bytes,
>  				     uint32_t aux_clock_divider);
> -	struct {
> -		enum drrs_support_type type;
> -		enum edp_drrs_refresh_rate_type refresh_rate_type;
> -		struct mutex mutex;
> -	} drrs_state;
> -
>  };
>  
>  struct intel_digital_port {
> @@ -938,7 +921,6 @@ void intel_edp_panel_on(struct intel_dp *intel_dp);
>  void intel_edp_panel_off(struct intel_dp *intel_dp);
>  void intel_edp_psr_enable(struct intel_dp *intel_dp);
>  void intel_edp_psr_disable(struct intel_dp *intel_dp);
> -void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate);
>  void intel_edp_psr_invalidate(struct drm_device *dev,
>  			      unsigned frontbuffer_bits);
>  void intel_edp_psr_flush(struct drm_device *dev,
> -- 
> 2.0.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 241b2bf..1713bb9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -680,11 +680,33 @@  struct i915_fbc {
 	} no_fbc_reason;
 };
 
-struct i915_drrs {
-	struct intel_connector *connector;
+/**
+ * HIGH_RR is the highest eDP panel refresh rate read from EDID
+ * LOW_RR is the lowest eDP panel refresh rate found from EDID
+ * parsing for same resolution.
+ */
+enum drrs_refresh_rate_type {
+	DRRS_HIGH_RR,
+	DRRS_LOW_RR,
+	DRRS_MAX_RR, /* RR count */
+};
+
+enum drrs_support_type {
+	DRRS_NOT_SUPPORTED = 0,
+	STATIC_DRRS_SUPPORT = 1,
+	SEAMLESS_DRRS_SUPPORT = 2
 };
 
 struct intel_dp;
+struct i915_drrs {
+	struct mutex mutex;
+	struct delayed_work work;
+	struct intel_dp *dp;
+	unsigned busy_frontbuffer_bits;
+	enum drrs_refresh_rate_type refresh_rate_type;
+	enum drrs_support_type type;
+};
+
 struct i915_psr {
 	struct mutex lock;
 	bool sink_support;
@@ -1290,12 +1312,6 @@  struct ddi_vbt_port_info {
 	uint8_t supports_dp:1;
 };
 
-enum drrs_support_type {
-	DRRS_NOT_SUPPORTED = 0,
-	STATIC_DRRS_SUPPORT = 1,
-	SEAMLESS_DRRS_SUPPORT = 2
-};
-
 struct intel_vbt_data {
 	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
 	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ab7cd0a..be9d90d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1139,7 +1139,7 @@  found:
 			       &pipe_config->dp_m_n);
 
 	if (intel_connector->panel.downclock_mode != NULL &&
-		intel_dp->drrs_state.type == SEAMLESS_DRRS_SUPPORT) {
+		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
 			pipe_config->has_drrs = true;
 			intel_link_compute_m_n(bpp, lane_count,
 				intel_connector->panel.downclock_mode->clock,
@@ -4794,24 +4794,24 @@  intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
 		      I915_READ(pp_div_reg));
 }
 
-void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
+static void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_encoder *encoder;
-	struct intel_dp *intel_dp = NULL;
+	struct intel_digital_port *dig_port = NULL;
+	struct intel_dp *intel_dp = dev_priv->drrs.dp;
 	struct intel_crtc_config *config = NULL;
 	struct intel_crtc *intel_crtc = NULL;
-	struct intel_connector *intel_connector = dev_priv->drrs.connector;
 	u32 reg, val;
-	enum edp_drrs_refresh_rate_type index = DRRS_HIGH_RR;
+	enum drrs_refresh_rate_type index = DRRS_HIGH_RR;
 
 	if (refresh_rate <= 0) {
 		DRM_DEBUG_KMS("Refresh rate should be positive non-zero.\n");
 		return;
 	}
 
-	if (intel_connector == NULL) {
-		DRM_DEBUG_KMS("DRRS supported for eDP only.\n");
+	if (intel_dp == NULL) {
+		DRM_DEBUG_KMS("DRRS not supported.\n");
 		return;
 	}
 
@@ -4825,8 +4825,8 @@  void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
 		return;
 	}
 
-	encoder = intel_attached_encoder(&intel_connector->base);
-	intel_dp = enc_to_intel_dp(&encoder->base);
+	dig_port = dp_to_dig_port(intel_dp);
+	encoder = &dig_port->base;
 	intel_crtc = encoder->new_crtc;
 
 	if (!intel_crtc) {
@@ -4836,15 +4836,16 @@  void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
 
 	config = &intel_crtc->config;
 
-	if (intel_dp->drrs_state.type < SEAMLESS_DRRS_SUPPORT) {
+	if (dev_priv->drrs.type < SEAMLESS_DRRS_SUPPORT) {
 		DRM_DEBUG_KMS("Only Seamless DRRS supported.\n");
 		return;
 	}
 
-	if (intel_connector->panel.downclock_mode->vrefresh == refresh_rate)
+	if (intel_dp->attached_connector->panel.downclock_mode->vrefresh ==
+								refresh_rate)
 		index = DRRS_LOW_RR;
 
-	if (index == intel_dp->drrs_state.refresh_rate_type) {
+	if (index == dev_priv->drrs.refresh_rate_type) {
 		DRM_DEBUG_KMS(
 			"DRRS requested for previously set RR...ignoring\n");
 		return;
@@ -4873,24 +4874,21 @@  void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
 	 * in future when idleness detection based DRRS in kernel and
 	 * possible calls from user space to set differnt RR are made.
 	 */
+	mutex_lock(&dev_priv->drrs.mutex);
 
-	mutex_lock(&intel_dp->drrs_state.mutex);
+	dev_priv->drrs.refresh_rate_type = index;
 
-	intel_dp->drrs_state.refresh_rate_type = index;
-
-	mutex_unlock(&intel_dp->drrs_state.mutex);
+	mutex_unlock(&dev_priv->drrs.mutex);
 
 	DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate);
 }
 
 static struct drm_display_mode *
-intel_dp_drrs_init(struct intel_digital_port *intel_dig_port,
-			struct intel_connector *intel_connector,
-			struct drm_display_mode *fixed_mode)
+intel_dp_drrs_init(struct intel_connector *intel_connector,
+		   struct drm_display_mode *fixed_mode)
 {
 	struct drm_connector *connector = &intel_connector->base;
-	struct intel_dp *intel_dp = &intel_dig_port->dp;
-	struct drm_device *dev = intel_dig_port->base.base.dev;
+	struct drm_device *dev = connector->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_display_mode *downclock_mode = NULL;
 
@@ -4912,13 +4910,11 @@  intel_dp_drrs_init(struct intel_digital_port *intel_dig_port,
 		return NULL;
 	}
 
-	dev_priv->drrs.connector = intel_connector;
-
-	mutex_init(&intel_dp->drrs_state.mutex);
+	mutex_init(&dev_priv->drrs.mutex);
 
-	intel_dp->drrs_state.type = dev_priv->vbt.drrs_type;
+	dev_priv->drrs.type = dev_priv->vbt.drrs_type;
 
-	intel_dp->drrs_state.refresh_rate_type = DRRS_HIGH_RR;
+	dev_priv->drrs.refresh_rate_type = DRRS_HIGH_RR;
 	DRM_DEBUG_KMS("seamless DRRS supported for eDP panel.\n");
 	return downclock_mode;
 }
@@ -4969,7 +4965,7 @@  static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 	struct drm_display_mode *scan;
 	struct edid *edid;
 
-	intel_dp->drrs_state.type = DRRS_NOT_SUPPORTED;
+	dev_priv->drrs.type = DRRS_NOT_SUPPORTED;
 
 	if (!is_edp(intel_dp))
 		return true;
@@ -5018,7 +5014,6 @@  static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 		if ((scan->type & DRM_MODE_TYPE_PREFERRED)) {
 			fixed_mode = drm_mode_duplicate(dev, scan);
 			downclock_mode = intel_dp_drrs_init(
-						intel_dig_port,
 						intel_connector, fixed_mode);
 			break;
 		}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 07ce046..5b613e0 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -531,17 +531,6 @@  struct intel_hdmi {
 struct intel_dp_mst_encoder;
 #define DP_MAX_DOWNSTREAM_PORTS		0x10
 
-/**
- * HIGH_RR is the highest eDP panel refresh rate read from EDID
- * LOW_RR is the lowest eDP panel refresh rate found from EDID
- * parsing for same resolution.
- */
-enum edp_drrs_refresh_rate_type {
-	DRRS_HIGH_RR,
-	DRRS_LOW_RR,
-	DRRS_MAX_RR, /* RR count */
-};
-
 struct intel_dp {
 	uint32_t output_reg;
 	uint32_t aux_ch_ctl_reg;
@@ -596,12 +585,6 @@  struct intel_dp {
 				     bool has_aux_irq,
 				     int send_bytes,
 				     uint32_t aux_clock_divider);
-	struct {
-		enum drrs_support_type type;
-		enum edp_drrs_refresh_rate_type refresh_rate_type;
-		struct mutex mutex;
-	} drrs_state;
-
 };
 
 struct intel_digital_port {
@@ -938,7 +921,6 @@  void intel_edp_panel_on(struct intel_dp *intel_dp);
 void intel_edp_panel_off(struct intel_dp *intel_dp);
 void intel_edp_psr_enable(struct intel_dp *intel_dp);
 void intel_edp_psr_disable(struct intel_dp *intel_dp);
-void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate);
 void intel_edp_psr_invalidate(struct drm_device *dev,
 			      unsigned frontbuffer_bits);
 void intel_edp_psr_flush(struct drm_device *dev,