diff mbox

PCI: designware: Fix configuration base address

Message ID 1411482540-31297-1-git-send-email-Minghuan.Lian@freescale.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

Minghuan Lian Sept. 23, 2014, 2:28 p.m. UTC
The code has calculated cfg0_base and cfg1_base when parsing 'reg'
or 'ranges' property of PCI DTS node. so remove duplicate calculation.
And when using 'reg', resource cfg is not used, the removed code
will get incorrect configuration base.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
---
 drivers/pci/host/pcie-designware.c | 2 --
 1 file changed, 2 deletions(-)

Comments

Bjorn Helgaas Sept. 23, 2014, 10:53 p.m. UTC | #1
[+cc Mohit, Jingoo]

On Tue, Sep 23, 2014 at 10:28:56PM +0800, Minghuan Lian wrote:
> The code has calculated cfg0_base and cfg1_base when parsing 'reg'
> or 'ranges' property of PCI DTS node. so remove duplicate calculation.
> And when using 'reg', resource cfg is not used, the removed code
> will get incorrect configuration base.
> 
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> ---
>  drivers/pci/host/pcie-designware.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index c28ca05..0f3cb2a 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -515,7 +515,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>  	pp->mem_base = pp->mem.start;
>  
>  	if (!pp->va_cfg0_base) {
> -		pp->cfg0_base = pp->cfg.start;
>  		pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
>  						pp->cfg0_size);
>  		if (!pp->va_cfg0_base) {
> @@ -525,7 +524,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>  	}
>  
>  	if (!pp->va_cfg1_base) {
> -		pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
>  		pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base,
>  						pp->cfg1_size);
>  		if (!pp->va_cfg1_base) {
> -- 
> 1.9.1
> 
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Mohit KUMAR DCG Sept. 24, 2014, 4:14 a.m. UTC | #2
Hello Minghuan,

> -----Original Message-----
> From: Bjorn Helgaas [mailto:bhelgaas@google.com]
> Sent: Wednesday, September 24, 2014 4:23 AM
> To: Minghuan Lian
> Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Zang
> Roy-R61911; Hu Mingkai-B21284; Scott Wood; Yoder Stuart-B08248; Arnd
> Bergmann; Mohit KUMAR DCG; Jingoo Han
> Subject: Re: [PATCH] PCI: designware: Fix configuration base address
> 
> [+cc Mohit, Jingoo]
> 
> On Tue, Sep 23, 2014 at 10:28:56PM +0800, Minghuan Lian wrote:
> > The code has calculated cfg0_base and cfg1_base when parsing 'reg'
> > or 'ranges' property of PCI DTS node. so remove duplicate calculation.
> > And when using 'reg', resource cfg is not used, the removed code will
> > get incorrect configuration base.
> >
> > Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> > ---
> >  drivers/pci/host/pcie-designware.c | 2 --
> >  1 file changed, 2 deletions(-)
> >
> > diff --git a/drivers/pci/host/pcie-designware.c
> > b/drivers/pci/host/pcie-designware.c
> > index c28ca05..0f3cb2a 100644
> > --- a/drivers/pci/host/pcie-designware.c
> > +++ b/drivers/pci/host/pcie-designware.c
> > @@ -515,7 +515,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> >  	pp->mem_base = pp->mem.start;
> >
> >  	if (!pp->va_cfg0_base) {
> > -		pp->cfg0_base = pp->cfg.start;
> >  		pp->va_cfg0_base = devm_ioremap(pp->dev, pp-
> >cfg0_base,
> >  						pp->cfg0_size);
> >  		if (!pp->va_cfg0_base) {
> > @@ -525,7 +524,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> >  	}
> >
> >  	if (!pp->va_cfg1_base) {
> > -		pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
> >  		pp->va_cfg1_base = devm_ioremap(pp->dev, pp-
> >cfg1_base,
> >  						pp->cfg1_size);
> >  		if (!pp->va_cfg1_base) {
> > --
> > 1.9.1
> >

- Acked-by: Mohit KUMAR <mohit.kumar@st.com>

Thanks
Mohit
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Bjorn Helgaas Sept. 24, 2014, 1:25 p.m. UTC | #3
On Tue, Sep 23, 2014 at 10:28:56PM +0800, Minghuan Lian wrote:
> The code has calculated cfg0_base and cfg1_base when parsing 'reg'
> or 'ranges' property of PCI DTS node. so remove duplicate calculation.
> And when using 'reg', resource cfg is not used, the removed code
> will get incorrect configuration base.
> 
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>

Applied to pci/host-designware with Mohit's ack for v3.18, thanks!

> ---
>  drivers/pci/host/pcie-designware.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index c28ca05..0f3cb2a 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -515,7 +515,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>  	pp->mem_base = pp->mem.start;
>  
>  	if (!pp->va_cfg0_base) {
> -		pp->cfg0_base = pp->cfg.start;
>  		pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
>  						pp->cfg0_size);
>  		if (!pp->va_cfg0_base) {
> @@ -525,7 +524,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>  	}
>  
>  	if (!pp->va_cfg1_base) {
> -		pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
>  		pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base,
>  						pp->cfg1_size);
>  		if (!pp->va_cfg1_base) {
> -- 
> 1.9.1
> 
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diff mbox

Patch

diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index c28ca05..0f3cb2a 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -515,7 +515,6 @@  int __init dw_pcie_host_init(struct pcie_port *pp)
 	pp->mem_base = pp->mem.start;
 
 	if (!pp->va_cfg0_base) {
-		pp->cfg0_base = pp->cfg.start;
 		pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
 						pp->cfg0_size);
 		if (!pp->va_cfg0_base) {
@@ -525,7 +524,6 @@  int __init dw_pcie_host_init(struct pcie_port *pp)
 	}
 
 	if (!pp->va_cfg1_base) {
-		pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
 		pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base,
 						pp->cfg1_size);
 		if (!pp->va_cfg1_base) {