| Message ID | 1410909548-4945-3-git-send-email-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2014-09-16 20:19 GMT-03:00 Rodrigo Vivi <rodrigo.vivi@gmail.com>: > The panel has to be reconfigured only when it really loose the power. > The traditional enable/disable sequence already take care of this so we can > minimize the time spend on every re-enable. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 168b3c3..2f0eee5 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1885,10 +1885,7 @@ static void intel_edp_psr_do_enable(struct intel_dp *intel_dp) > WARN_ON(dev_priv->psr.active); > lockdep_assert_held(&dev_priv->psr.lock); > > - /* Enable PSR on the panel */ > - intel_edp_psr_enable_sink(intel_dp); > - > - /* Enable PSR on the host */ > + /* Enable/Re-enable PSR on the host */ > intel_edp_psr_enable_source(intel_dp); > > dev_priv->psr.active = true; > @@ -1926,6 +1923,9 @@ void intel_edp_psr_enable(struct intel_dp *intel_dp) > I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | > EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); > > + /* Enable PSR on the panel */ > + intel_edp_psr_enable_sink(intel_dp); > + > dev_priv->psr.enabled = intel_dp; > unlock: > mutex_unlock(&dev_priv->psr.lock); > -- > 1.9.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 168b3c3..2f0eee5 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1885,10 +1885,7 @@ static void intel_edp_psr_do_enable(struct intel_dp *intel_dp) WARN_ON(dev_priv->psr.active); lockdep_assert_held(&dev_priv->psr.lock); - /* Enable PSR on the panel */ - intel_edp_psr_enable_sink(intel_dp); - - /* Enable PSR on the host */ + /* Enable/Re-enable PSR on the host */ intel_edp_psr_enable_source(intel_dp); dev_priv->psr.active = true; @@ -1926,6 +1923,9 @@ void intel_edp_psr_enable(struct intel_dp *intel_dp) I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); + /* Enable PSR on the panel */ + intel_edp_psr_enable_sink(intel_dp); + dev_priv->psr.enabled = intel_dp; unlock: mutex_unlock(&dev_priv->psr.lock);
The panel has to be reconfigured only when it really loose the power. The traditional enable/disable sequence already take care of this so we can minimize the time spend on every re-enable. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/intel_dp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)