diff mbox

spi: fsl-spi: Don't use cpm_command on CPM1

Message ID 20141120162418.04FAC1A9BFC@localhost.localdomain (mailing list archive)
State Accepted
Commit 194ed900cac2070175c6e6bf6d23e6bb7400a0f2
Headers show

Commit Message

Christophe Leroy Nov. 20, 2014, 4:24 p.m. UTC
On CPM1, when the SPI parameter RAM is relocated to somewhere else than the
default location, in accordance with freescale documentation
(refer micropatch SPI application note EB662), init RX/TX params command shall
not be used because it doesn't take into account the new location, and
overwrites data that is in original location of SPI param ram at addresses 
SCC2 param base +  (u32*)0x88 (u16*)0x90 (u32*)0x98 (u16*)0xA0, hence breaking
activity on SCC2 if SCC2 is used in a mode like QMC for instance.

Therefore, the action shall be done manually as described by freescale and as
was already partly done by the driver.

Reported-by: Patrick Vasseur <patrick.vasseur@c-s.fr>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Tested-by: Patrick Vasseur <patrick.vasseur@c-s.fr>

---
 drivers/spi/spi-fsl-cpm.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Mark Brown Nov. 21, 2014, 6:12 p.m. UTC | #1
On Thu, Nov 20, 2014 at 05:24:17PM +0100, Christophe Leroy wrote:
> On CPM1, when the SPI parameter RAM is relocated to somewhere else than the
> default location, in accordance with freescale documentation
> (refer micropatch SPI application note EB662), init RX/TX params command shall
> not be used because it doesn't take into account the new location, and
> overwrites data that is in original location of SPI param ram at addresses 
> SCC2 param base +  (u32*)0x88 (u16*)0x90 (u32*)0x98 (u16*)0xA0, hence breaking
> activity on SCC2 if SCC2 is used in a mode like QMC for instance.

Applied, thanks.
diff mbox

Patch

diff --git a/drivers/spi/spi-fsl-cpm.c b/drivers/spi/spi-fsl-cpm.c
index 54b0637..da97988 100644
--- a/drivers/spi/spi-fsl-cpm.c
+++ b/drivers/spi/spi-fsl-cpm.c
@@ -56,12 +56,15 @@  void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi)
 		qe_issue_cmd(QE_INIT_TX_RX, mspi->subblock,
 			     QE_CR_PROTOCOL_UNSPECIFIED, 0);
 	} else {
-		cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
 		if (mspi->flags & SPI_CPM1) {
+			out_be32(&mspi->pram->rstate, 0);
 			out_be16(&mspi->pram->rbptr,
 				 in_be16(&mspi->pram->rbase));
+			out_be32(&mspi->pram->tstate, 0);
 			out_be16(&mspi->pram->tbptr,
 				 in_be16(&mspi->pram->tbase));
+		} else {
+			cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
 		}
 	}
 }