| Message ID | 1418302115-8668-1-git-send-email-thomas.daniel@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK +1 364/366 365/366
SNB 448/450 448/450
IVB 497/498 497/498
BYT 289/289 289/289
HSW -1 563/564 562/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(7, M26)PASS(25, M26M37) PASS(1, M37)
*HSW igt_pm_rpm_dpms-mode-unset-non-lpsp PASS(3, M40) DMESG_WARN(1, M40)
Note: You need to pay more attention to line start with '*'
On Thu, Dec 11, 2014 at 12:48:35PM +0000, Thomas Daniel wrote: > Execlist support in the i915 driver is now considered good enough for the > feature to be enabled by default on Gen8 and later and routinely tested. > Adjusted i915 parameters structure initialization to reflect this and updated > the comment in intel_sanitize_enable_execlists(). > > v2: Update the MODULE_PARM_DESC too. MO is to mention the reviewer for each change and add them to the cc: list. Not too important for something simple like this, but a good habit. > > Issue: VIZ-2020 > Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_params.c | 4 ++-- > drivers/gpu/drm/i915/intel_lrc.c | 3 +-- > 2 files changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c > index c91cb20..f6af6d4 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -35,7 +35,7 @@ struct i915_params i915 __read_mostly = { > .vbt_sdvo_panel_type = -1, > .enable_rc6 = -1, > .enable_fbc = -1, > - .enable_execlists = 0, > + .enable_execlists = -1, > .enable_hangcheck = true, > .enable_ppgtt = -1, > .enable_psr = 0, > @@ -122,7 +122,7 @@ MODULE_PARM_DESC(enable_ppgtt, > module_param_named(enable_execlists, i915.enable_execlists, int, 0400); > MODULE_PARM_DESC(enable_execlists, > "Override execlists usage. " > - "(-1=auto, 0=disabled [default], 1=enabled)"); > + "(-1=auto [default], 0=disabled, 1=enabled)"); > > module_param_named(enable_psr, i915.enable_psr, int, 0600); > MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)"); > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > index 89b5577..4dc6d42 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -212,8 +212,7 @@ static int intel_lr_context_pin(struct intel_engine_cs *ring, > * @enable_execlists: value of i915.enable_execlists module parameter. > * > * Only certain platforms support Execlists (the prerequisites being > - * support for Logical Ring Contexts and Aliasing PPGTT or better), > - * and only when enabled via module parameter. > + * support for Logical Ring Contexts and Aliasing PPGTT or better). > * > * Return: 1 if Execlists is supported and has to be enabled. > */ > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Thu, Dec 11, 2014 at 12:48:35PM +0000, Thomas Daniel wrote: > Execlist support in the i915 driver is now considered good enough for the > feature to be enabled by default on Gen8 and later and routinely tested. > Adjusted i915 parameters structure initialization to reflect this and updated > the comment in intel_sanitize_enable_execlists(). Oh and I added a note that we still have a bit of work to do before the 3.20 cutoff. But enabling earlier is beneficial for testing and the 3.20 cycle just started for drm/i915 so here we go. -Daniel
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index c91cb20..f6af6d4 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -35,7 +35,7 @@ struct i915_params i915 __read_mostly = { .vbt_sdvo_panel_type = -1, .enable_rc6 = -1, .enable_fbc = -1, - .enable_execlists = 0, + .enable_execlists = -1, .enable_hangcheck = true, .enable_ppgtt = -1, .enable_psr = 0, @@ -122,7 +122,7 @@ MODULE_PARM_DESC(enable_ppgtt, module_param_named(enable_execlists, i915.enable_execlists, int, 0400); MODULE_PARM_DESC(enable_execlists, "Override execlists usage. " - "(-1=auto, 0=disabled [default], 1=enabled)"); + "(-1=auto [default], 0=disabled, 1=enabled)"); module_param_named(enable_psr, i915.enable_psr, int, 0600); MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)"); diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 89b5577..4dc6d42 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -212,8 +212,7 @@ static int intel_lr_context_pin(struct intel_engine_cs *ring, * @enable_execlists: value of i915.enable_execlists module parameter. * * Only certain platforms support Execlists (the prerequisites being - * support for Logical Ring Contexts and Aliasing PPGTT or better), - * and only when enabled via module parameter. + * support for Logical Ring Contexts and Aliasing PPGTT or better). * * Return: 1 if Execlists is supported and has to be enabled. */
Execlist support in the i915 driver is now considered good enough for the feature to be enabled by default on Gen8 and later and routinely tested. Adjusted i915 parameters structure initialization to reflect this and updated the comment in intel_sanitize_enable_execlists(). v2: Update the MODULE_PARM_DESC too. Issue: VIZ-2020 Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> --- drivers/gpu/drm/i915/i915_params.c | 4 ++-- drivers/gpu/drm/i915/intel_lrc.c | 3 +-- 2 files changed, 3 insertions(+), 4 deletions(-)