| Message ID | 1419436468.4705.105.camel@decadent.org.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Dec 24, 2014 at 03:54:28PM +0000, Ben Hutchings wrote: > The VMSA field of MMFR0 (bottom 4 bits) is incremented for each > added feature. PXN is supported if the value is >= 4 and LPAE > is supported if it is >= 5. > > In case a kernel with CONFIG_ARM_LPAE disabled is used on a > processor that supports LPAE, we can still use PXN in short > descriptors. So check for >= 4 not == 4. > > Signed-off-by: Ben Hutchings <ben@decadent.org.uk> > Cc: Jungseung Lee <js07.lee@gmail.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Hi, Ben. 2014-12-25 2:20 GMT+09:00 Catalin Marinas <catalin.marinas@arm.com>: > On Wed, Dec 24, 2014 at 03:54:28PM +0000, Ben Hutchings wrote: >> The VMSA field of MMFR0 (bottom 4 bits) is incremented for each >> added feature. PXN is supported if the value is >= 4 and LPAE >> is supported if it is >= 5. >> >> In case a kernel with CONFIG_ARM_LPAE disabled is used on a >> processor that supports LPAE, we can still use PXN in short >> descriptors. So check for >= 4 not == 4. >> >> Signed-off-by: Ben Hutchings <ben@decadent.org.uk> >> Cc: Jungseung Lee <js07.lee@gmail.com> >> Cc: Catalin Marinas <catalin.marinas@arm.com> > > Acked-by: Catalin Marinas <catalin.marinas@arm.com> Is this patch handled? or you can send it to Russell's patch system: http://www.arm.linux.org.uk/developer/patches/
On Mon, May 11, 2015 at 05:09:35PM +0900, Jungseung Lee wrote: > Hi, Ben. > > 2014-12-25 2:20 GMT+09:00 Catalin Marinas <catalin.marinas@arm.com>: > > On Wed, Dec 24, 2014 at 03:54:28PM +0000, Ben Hutchings wrote: > >> The VMSA field of MMFR0 (bottom 4 bits) is incremented for each > >> added feature. PXN is supported if the value is >= 4 and LPAE > >> is supported if it is >= 5. > >> > >> In case a kernel with CONFIG_ARM_LPAE disabled is used on a > >> processor that supports LPAE, we can still use PXN in short > >> descriptors. So check for >= 4 not == 4. > >> > >> Signed-off-by: Ben Hutchings <ben@decadent.org.uk> > >> Cc: Jungseung Lee <js07.lee@gmail.com> > >> Cc: Catalin Marinas <catalin.marinas@arm.com> > > > > Acked-by: Catalin Marinas <catalin.marinas@arm.com> > > Is this patch handled? If it's not in mainline already, than it probably isn't handled. > or you can send it to Russell's patch system: > http://www.arm.linux.org.uk/developer/patches/ Check mainline first, otherwise please submit it.
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index cda7c40..0872dc0 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -530,7 +530,7 @@ static void __init build_mem_type_table(void) * in the Short-descriptor translation table format descriptors. */ if (cpu_arch == CPU_ARCH_ARMv7 && - (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xF) == 4) { + (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xF) >= 4) { user_pmd_table |= PMD_PXNTABLE; } #endif
The VMSA field of MMFR0 (bottom 4 bits) is incremented for each added feature. PXN is supported if the value is >= 4 and LPAE is supported if it is >= 5. In case a kernel with CONFIG_ARM_LPAE disabled is used on a processor that supports LPAE, we can still use PXN in short descriptors. So check for >= 4 not == 4. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Cc: Jungseung Lee <js07.lee@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> --- This worked for me in QEMU's vexpress-a15 emulation, but I don't have real hardware available to test with right now. Ben. arch/arm/mm/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)