| Message ID | 1420684267-19211-1-git-send-email-oder_chiou@realtek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Jan 08, 2015 at 10:31:05AM +0800, Oder Chiou wrote: > The patch modified the behavior that updates the PLL parameter. It set the > update bit before the PLL power up. This looks like it's a bug fix?
> -----Original Message----- > From: Mark Brown [mailto:broonie@kernel.org] > Sent: Friday, January 09, 2015 2:36 AM > To: Oder Chiou > Cc: lgirdwood@gmail.com; alsa-devel@alsa-project.org; Bard Liao; Flove; John Lin; > yang.a.fang@intel.com > Subject: Re: [PATCH 1/3] ASoC: rt5677: Modify the behavior that updates the PLL > parameter. > > On Thu, Jan 08, 2015 at 10:31:05AM +0800, Oder Chiou wrote: > > The patch modified the behavior that updates the PLL parameter. It set > > the update bit before the PLL power up. > > This looks like it's a bug fix? > Actually, the previous version had be verified, but our HW engineer recommended to this kind of sequence, thanks.
On Thu, Jan 08, 2015 at 10:31:05AM +0800, Oder Chiou wrote: > The patch modified the behavior that updates the PLL parameter. It set the > update bit before the PLL power up. Applied, thanks.
On Fri, Jan 09, 2015 at 02:20:37AM +0000, Oder Chiou wrote: > > This looks like it's a bug fix? > Actually, the previous version had be verified, but our HW engineer recommended > to this kind of sequence, thanks. That does sound like a hardware correctness fix then - something that will fail in some use cases or based on factors like timing.
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index 8900221..d27630a 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -2174,10 +2174,14 @@ static int rt5677_set_pll1_event(struct snd_soc_dapm_widget *w, struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); switch (event) { - case SND_SOC_DAPM_POST_PMU: + case SND_SOC_DAPM_PRE_PMU: regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2); + break; + + case SND_SOC_DAPM_POST_PMU: regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0); break; + default: return 0; } @@ -2192,10 +2196,14 @@ static int rt5677_set_pll2_event(struct snd_soc_dapm_widget *w, struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); switch (event) { - case SND_SOC_DAPM_POST_PMU: + case SND_SOC_DAPM_PRE_PMU: regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2); + break; + + case SND_SOC_DAPM_POST_PMU: regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0); break; + default: return 0; } @@ -2303,9 +2311,11 @@ static int rt5677_vref_event(struct snd_soc_dapm_widget *w, static const struct snd_soc_dapm_widget rt5677_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("PLL1", RT5677_PWR_ANLG2, RT5677_PWR_PLL1_BIT, - 0, rt5677_set_pll1_event, SND_SOC_DAPM_POST_PMU), + 0, rt5677_set_pll1_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_SUPPLY("PLL2", RT5677_PWR_ANLG2, RT5677_PWR_PLL2_BIT, - 0, rt5677_set_pll2_event, SND_SOC_DAPM_POST_PMU), + 0, rt5677_set_pll2_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMU), /* ASRC */ SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5677_ASRC_1, 0, 0, NULL, 0),
The patch modified the behavior that updates the PLL parameter. It set the update bit before the PLL power up. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> --- sound/soc/codecs/rt5677.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-)