diff mbox

ARM: EXYNOS: enable 4 cores secondary cpu up for exynos5440

Message ID 1356980980-3387-1-git-send-email-kgene.kim@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Kim Kukjin Dec. 31, 2012, 7:09 p.m. UTC
No need to check power on/off with pmu control to support hotplug
in/out on exynos5440. And this patch enables 4 cores on exynos5440.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/mach-exynos/platsmp.c |   37 ++++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 15 deletions(-)

Comments

Olof Johansson Jan. 2, 2013, 8:29 p.m. UTC | #1
Hi,

On Mon, Dec 31, 2012 at 11:09 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> No need to check power on/off with pmu control to support hotplug
> in/out on exynos5440. And this patch enables 4 cores on exynos5440.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  arch/arm/mach-exynos/platsmp.c |   37 ++++++++++++++++++++++---------------
>  1 file changed, 22 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index c5c840e..495a501 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -40,6 +40,8 @@ static inline void __iomem *cpu_boot_reg_base(void)
>  {
>         if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
>                 return S5P_INFORM5;
> +       else if (soc_is_exynos5440())
> +               return (S5P_VA_CHIPID + 0x560);
>         return S5P_VA_SYSRAM;
>  }
>
> @@ -116,27 +118,30 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
>          */
>         write_pen_release(phys_cpu);
>
> -       if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
> -               __raw_writel(S5P_CORE_LOCAL_PWR_EN,
> -                            S5P_ARM_CORE1_CONFIGURATION);
> +       if (!soc_is_exynos5440()) {
> +               if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
> +                       __raw_writel(S5P_CORE_LOCAL_PWR_EN,
> +                                    S5P_ARM_CORE1_CONFIGURATION);

It seems better to create a helper function here instead and calling
that, instead of switching to a conditional open-coded block to this
function.


> @@ -178,6 +183,8 @@ static void __init exynos_smp_init_cpus(void)
>
>         if (soc_is_exynos5250())
>                 ncores = 2;
> +       else if (soc_is_exynos5440())
> +               ncores = 4;

In the future it would make sense to get the core count from the
device tree instead.


-Olof
Kim Kukjin Jan. 2, 2013, 10:44 p.m. UTC | #2
Olof Johansson wrote:
> 
> Hi,
> 
Hi,

[...]

> It seems better to create a helper function here instead and calling
> that, instead of switching to a conditional open-coded block to this
> function.
>
Yes, sounds good. I will.

> > @@ -178,6 +183,8 @@ static void __init exynos_smp_init_cpus(void)
> >
> >         if (soc_is_exynos5250())
> >                 ncores = 2;
> > +       else if (soc_is_exynos5440())
> > +               ncores = 4;
> 
> In the future it would make sense to get the core count from the
> device tree instead.
> 
Agreed.

Thanks.

- Kukjin
Ming Lei Jan. 7, 2015, 2:31 a.m. UTC | #3
Hi Kukjin,

On Tue, Jan 1, 2013 at 3:09 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> No need to check power on/off with pmu control to support hotplug
> in/out on exynos5440. And this patch enables 4 cores on exynos5440.

Without this patch, oops will be triggered during kernel booting on
exynos5440, so could this one be pushed out?

Thanks,
Ming Lei

>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  arch/arm/mach-exynos/platsmp.c |   37 ++++++++++++++++++++++---------------
>  1 file changed, 22 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index c5c840e..495a501 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -40,6 +40,8 @@ static inline void __iomem *cpu_boot_reg_base(void)
>  {
>         if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
>                 return S5P_INFORM5;
> +       else if (soc_is_exynos5440())
> +               return (S5P_VA_CHIPID + 0x560);
>         return S5P_VA_SYSRAM;
>  }
>
> @@ -116,27 +118,30 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
>          */
>         write_pen_release(phys_cpu);
>
> -       if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
> -               __raw_writel(S5P_CORE_LOCAL_PWR_EN,
> -                            S5P_ARM_CORE1_CONFIGURATION);
> +       if (!soc_is_exynos5440()) {
> +               if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
> +                       __raw_writel(S5P_CORE_LOCAL_PWR_EN,
> +                                    S5P_ARM_CORE1_CONFIGURATION);
>
> -               timeout = 10;
> +                       timeout = 10;
>
> -               /* wait max 10 ms until cpu1 is on */
> -               while ((__raw_readl(S5P_ARM_CORE1_STATUS)
> -                       & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
> -                       if (timeout-- == 0)
> -                               break;
> +                       /* wait max 10 ms until cpu1 is on */
> +                       while ((__raw_readl(S5P_ARM_CORE1_STATUS)
> +                               & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
> +                               if (timeout-- == 0)
> +                                       break;
>
> -                       mdelay(1);
> -               }
> +                               mdelay(1);
> +                       }
>
> -               if (timeout == 0) {
> -                       printk(KERN_ERR "cpu1 power enable failed");
> -                       spin_unlock(&boot_lock);
> -                       return -ETIMEDOUT;
> +                       if (timeout == 0) {
> +                               printk(KERN_ERR "cpu1 power enable failed");
> +                               spin_unlock(&boot_lock);
> +                               return -ETIMEDOUT;
> +                       }
>                 }
>         }
> +
>         /*
>          * Send the secondary CPU a soft interrupt, thereby causing
>          * the boot monitor to read the system wide flags register,
> @@ -178,6 +183,8 @@ static void __init exynos_smp_init_cpus(void)
>
>         if (soc_is_exynos5250())
>                 ncores = 2;
> +       else if (soc_is_exynos5440())
> +               ncores = 4;
>         else
>                 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
>
> --
> 1.7.10.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
kgene@kernel.org Jan. 14, 2015, 4:19 p.m. UTC | #4
On 01/07/15 11:31, Ming Lei wrote:
> Hi Kukjin,
> 
Hi Ming Lei,

Sorry for late response.

> On Tue, Jan 1, 2013 at 3:09 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>> No need to check power on/off with pmu control to support hotplug
>> in/out on exynos5440. And this patch enables 4 cores on exynos5440.
> 
> Without this patch, oops will be triggered during kernel booting on
> exynos5440, so could this one be pushed out?
> 
Yeah, I know exynos5440 requires this at least kernel boot but something
like soc_is_xxx should be updated with others in these days...so I need
some time for this.

Thanks,
Kukjin

> Thanks,
> Ming Lei
> 
>>
>> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
>> ---
>>  arch/arm/mach-exynos/platsmp.c |   37 ++++++++++++++++++++++---------------
>>  1 file changed, 22 insertions(+), 15 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
>> index c5c840e..495a501 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -40,6 +40,8 @@ static inline void __iomem *cpu_boot_reg_base(void)
>>  {
>>         if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
>>                 return S5P_INFORM5;
>> +       else if (soc_is_exynos5440())
>> +               return (S5P_VA_CHIPID + 0x560);
>>         return S5P_VA_SYSRAM;
>>  }
>>
>> @@ -116,27 +118,30 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
>>          */
>>         write_pen_release(phys_cpu);
>>
>> -       if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
>> -               __raw_writel(S5P_CORE_LOCAL_PWR_EN,
>> -                            S5P_ARM_CORE1_CONFIGURATION);
>> +       if (!soc_is_exynos5440()) {
>> +               if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
>> +                       __raw_writel(S5P_CORE_LOCAL_PWR_EN,
>> +                                    S5P_ARM_CORE1_CONFIGURATION);
>>
>> -               timeout = 10;
>> +                       timeout = 10;
>>
>> -               /* wait max 10 ms until cpu1 is on */
>> -               while ((__raw_readl(S5P_ARM_CORE1_STATUS)
>> -                       & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
>> -                       if (timeout-- == 0)
>> -                               break;
>> +                       /* wait max 10 ms until cpu1 is on */
>> +                       while ((__raw_readl(S5P_ARM_CORE1_STATUS)
>> +                               & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
>> +                               if (timeout-- == 0)
>> +                                       break;
>>
>> -                       mdelay(1);
>> -               }
>> +                               mdelay(1);
>> +                       }
>>
>> -               if (timeout == 0) {
>> -                       printk(KERN_ERR "cpu1 power enable failed");
>> -                       spin_unlock(&boot_lock);
>> -                       return -ETIMEDOUT;
>> +                       if (timeout == 0) {
>> +                               printk(KERN_ERR "cpu1 power enable failed");
>> +                               spin_unlock(&boot_lock);
>> +                               return -ETIMEDOUT;
>> +                       }
>>                 }
>>         }
>> +
>>         /*
>>          * Send the secondary CPU a soft interrupt, thereby causing
>>          * the boot monitor to read the system wide flags register,
>> @@ -178,6 +183,8 @@ static void __init exynos_smp_init_cpus(void)
>>
>>         if (soc_is_exynos5250())
>>                 ncores = 2;
>> +       else if (soc_is_exynos5440())
>> +               ncores = 4;
>>         else
>>                 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
>>
>> --
>> 1.7.10.4
diff mbox

Patch

diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index c5c840e..495a501 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -40,6 +40,8 @@  static inline void __iomem *cpu_boot_reg_base(void)
 {
 	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
 		return S5P_INFORM5;
+	else if (soc_is_exynos5440())
+		return (S5P_VA_CHIPID + 0x560);
 	return S5P_VA_SYSRAM;
 }
 
@@ -116,27 +118,30 @@  static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
 	 */
 	write_pen_release(phys_cpu);
 
-	if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
-		__raw_writel(S5P_CORE_LOCAL_PWR_EN,
-			     S5P_ARM_CORE1_CONFIGURATION);
+	if (!soc_is_exynos5440()) {
+		if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
+			__raw_writel(S5P_CORE_LOCAL_PWR_EN,
+				     S5P_ARM_CORE1_CONFIGURATION);
 
-		timeout = 10;
+			timeout = 10;
 
-		/* wait max 10 ms until cpu1 is on */
-		while ((__raw_readl(S5P_ARM_CORE1_STATUS)
-			& S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
-			if (timeout-- == 0)
-				break;
+			/* wait max 10 ms until cpu1 is on */
+			while ((__raw_readl(S5P_ARM_CORE1_STATUS)
+				& S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
+				if (timeout-- == 0)
+					break;
 
-			mdelay(1);
-		}
+				mdelay(1);
+			}
 
-		if (timeout == 0) {
-			printk(KERN_ERR "cpu1 power enable failed");
-			spin_unlock(&boot_lock);
-			return -ETIMEDOUT;
+			if (timeout == 0) {
+				printk(KERN_ERR "cpu1 power enable failed");
+				spin_unlock(&boot_lock);
+				return -ETIMEDOUT;
+			}
 		}
 	}
+
 	/*
 	 * Send the secondary CPU a soft interrupt, thereby causing
 	 * the boot monitor to read the system wide flags register,
@@ -178,6 +183,8 @@  static void __init exynos_smp_init_cpus(void)
 
 	if (soc_is_exynos5250())
 		ncores = 2;
+	else if (soc_is_exynos5440())
+		ncores = 4;
 	else
 		ncores = scu_base ? scu_get_core_count(scu_base) : 1;