diff mbox

drm/i915: Use pipe_config's cpu_transcoder for reading dp_mst hw state

Message ID 1422611418-3753-1-git-send-email-ander.conselvan.de.oliveira@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ander Conselvan de Oliveira Jan. 30, 2015, 9:50 a.m. UTC
On the hardware state readout path, using crtc->config happens to work
since the proper value is written to it before encoder->get_config() is
called. However, in the check_crtc() path, the state will be read from
the cpu_transcoder in the software tracking, instead of the one just
read out from hw. Using the field in the supplied intel_crtc_state
should do the right thing in both cases.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
---

I noticed this while reading the code. Patch is only compiled tested.

---
 drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jani Nikula Jan. 30, 2015, 10:15 a.m. UTC | #1
On Fri, 30 Jan 2015, Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> wrote:
> On the hardware state readout path, using crtc->config happens to work
> since the proper value is written to it before encoder->get_config() is
> called. However, in the check_crtc() path, the state will be read from
> the cpu_transcoder in the software tracking, instead of the one just
> read out from hw. Using the field in the supplied intel_crtc_state
> should do the right thing in both cases.
>
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
> ---
>
> I noticed this while reading the code. Patch is only compiled tested.

There might be a bug for this.

BR,
Jani.

>
> ---
>  drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index 2856b0b..9f67a37 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -226,7 +226,7 @@ static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
>  	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
>  	struct drm_device *dev = encoder->base.dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
> +	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
>  	u32 temp, flags = 0;
>  
>  	pipe_config->has_dp_encoder = true;
> -- 
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ander Conselvan de Oliveira Jan. 30, 2015, 10:23 a.m. UTC | #2
On pe, 2015-01-30 at 12:15 +0200, Jani Nikula wrote:
> On Fri, 30 Jan 2015, Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> wrote:
> > On the hardware state readout path, using crtc->config happens to work
> > since the proper value is written to it before encoder->get_config() is
> > called. However, in the check_crtc() path, the state will be read from
> > the cpu_transcoder in the software tracking, instead of the one just
> > read out from hw. Using the field in the supplied intel_crtc_state
> > should do the right thing in both cases.
> >
> > Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
> > ---
> >
> > I noticed this while reading the code. Patch is only compiled tested.

I did a quick search, but I didn't find anything that seems related.
This shouldn't fix anything but a hypothetical WARN() after modeset, due
to the state tracked in software being different from what is read out
off the hardware.

Ander

> 
> There might be a bug for this.
> 
> BR,
> Jani.
> 
> >
> > ---
> >  drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> > index 2856b0b..9f67a37 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > @@ -226,7 +226,7 @@ static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
> >  	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
> >  	struct drm_device *dev = encoder->base.dev;
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> > -	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
> > +	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
> >  	u32 temp, flags = 0;
> >  
> >  	pipe_config->has_dp_encoder = true;
> > -- 
> > 2.1.0
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
Shuang He Feb. 1, 2015, 6:12 a.m. UTC | #3
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5687
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  353/353              353/353
ILK                 -1              353/353              352/353
SNB                                  400/422              400/422
IVB              +2-1              485/487              486/487
BYT                                  296/296              296/296
HSW              +1-1              507/508              507/508
BDW                                  401/402              401/402
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*ILK  igt_gem_unfence_active_buffers      PASS(2, M26)      DMESG_WARN(1, M26)
 IVB  igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance      DMESG_WARN(6, M34M21)PASS(8, M4M34)      PASS(1, M34)
 IVB  igt_gem_storedw_batches_loop_normal      DMESG_WARN(5, M34M4)PASS(15, M34M4M21)      PASS(1, M34)
 IVB  igt_gem_storedw_batches_loop_secure-dispatch      DMESG_WARN(1, M34)PASS(6, M34M4)      DMESG_WARN(1, M34)
*HSW  igt_gem_pwrite_pread_display-copy-performance      PASS(5, M40M20)      DMESG_WARN(1, M40)
 HSW  igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance      DMESG_WARN(1, M40)PASS(19, M40M20)      PASS(1, M40)
Note: You need to pay more attention to line start with '*'
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 2856b0b..9f67a37 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -226,7 +226,7 @@  static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 	struct drm_device *dev = encoder->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
+	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
 	u32 temp, flags = 0;
 
 	pipe_config->has_dp_encoder = true;