diff mbox

drm: Adding edp1.4 specific dpcd macros

Message ID 1424332004-6951-1-git-send-email-sonika.jindal@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sonika.jindal@intel.com Feb. 19, 2015, 7:46 a.m. UTC
Adding dpcd macros related to edp1.4 and link rates

v2: Added DP_SUPPORTED_LINK_RATES macros

Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
---
 include/drm/drm_dp_helper.h |    8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Daniel Vetter Feb. 23, 2015, 11:51 p.m. UTC | #1
Aside: reply-all seems to not work (or maybe you have reply-to-list as
default), dri-devel was lost. Readded.

On Fri, Feb 20, 2015 at 10:00:48AM -0700, Todd Previte wrote:
> 
> On 2/20/2015 1:25 AM, Jani Nikula wrote:
> >On Thu, 19 Feb 2015, Todd Previte <tprevite@gmail.com> wrote:
> >>Just some formatting issues that need to be cleaned up. Otherwise the
> >>definitions look correct according to the eDP 1.4 spec.
> >Actually the formatting seems to be in line with the rest of that
> >particular file.
> >
> >BR,
> >Jani.
> Interesting. Looks like there's some inconsistency in that header then. But
> if the formatting isn't an issue, it's otherwise correct.
> 
> Reviewed-by: Todd Previte <tprevite@gmail.com>

Queued to drm-misc, thanks for patch&review.
-Daniel
diff mbox

Patch

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 11f8c84..77a55e2 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -92,6 +92,9 @@ 
 # define DP_MSA_TIMING_PAR_IGNORED	    (1 << 6) /* eDP */
 # define DP_OUI_SUPPORT			    (1 << 7)
 
+#define DP_SUPPORTED_LINK_RATES			0x010 /*eDP 1.4*/
+#define DP_MAX_SUPPORTED_RATES			0x8
+
 #define DP_I2C_SPEED_CAP		    0x00c    /* DPI */
 # define DP_I2C_SPEED_1K		    0x01
 # define DP_I2C_SPEED_5K		    0x02
@@ -101,6 +104,7 @@ 
 # define DP_I2C_SPEED_1M		    0x20
 
 #define DP_EDP_CONFIGURATION_CAP            0x00d   /* XXX 1.2? */
+# define DP_DPCD_DISPLAY_CONTROL_CAPABLE     (1 << 3) /* edp v1.2 or higher */
 #define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
 
 /* Multiple stream transport */
@@ -221,6 +225,8 @@ 
 # define DP_UP_REQ_EN			    (1 << 1)
 # define DP_UPSTREAM_IS_SRC		    (1 << 2)
 
+#define DP_LINK_RATE_SET			0x115
+
 #define DP_PSR_EN_CFG			    0x170   /* XXX 1.2? */
 # define DP_PSR_ENABLE			    (1 << 0)
 # define DP_PSR_MAIN_LINK_ACTIVE	    (1 << 1)
@@ -332,6 +338,8 @@ 
 # define DP_SET_POWER_D3                    0x2
 # define DP_SET_POWER_MASK                  0x3
 
+#define DP_EDP_DPCD_REV                          0x700
+
 #define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
 #define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
 #define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */