| Message ID | 1426182985-10425-1-git-send-email-galak@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
> +/ { > + chosen { > + stdout-path = &blsp1_uart2; > + }; It would be good if we had the configuration too (see Documentation/devicetree/bindings/chosen.txt), as that avoids any reliance on kernel defaults. You can refer to an alias, so this could be: aliases { serial0 = &blsp1_uart2; }; chosen { stdout-path = "serial0:115200n8"; }; ...assuming that 115200n8 is correct for your UART, of course. [...] > +#include "skeleton.dtsi" I'd like to get rid of skeleton.dtsi; it causes more problems than it solves (the address/size cells mismatch is confusing and hidden, people forget to fill in memory nodes appropriately, etc). Please remove this include and place appropriate #address-cells and #size-cells here. I'd strongly recommend going with /#size-cells = <2>; it' will save on a lot of pain if you need to add PCIe or something with large ranges later. If things all fall in 4GB within the SoC then have /soc/#size=cells = <1> and an appropriate /soc/ranges property. I note this DT doesn't have any memory nodes. Is that an accident or does the loader fill that in? If the latter, have an empty node with a comment to that effect. Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mar 13, 2015, at 5:52 AM, Mark Rutland <mark.rutland@arm.com> wrote: >> +/ { >> + chosen { >> + stdout-path = &blsp1_uart2; >> + }; > > It would be good if we had the configuration too (see > Documentation/devicetree/bindings/chosen.txt), as that avoids any > reliance on kernel defaults. > > You can refer to an alias, so this could be: > > aliases { > serial0 = &blsp1_uart2; > }; > > chosen { > stdout-path = "serial0:115200n8"; > }; > > ...assuming that 115200n8 is correct for your UART, of course. > > > […] Where is the code that actually handles this parsing? I’m not see it in early_init_dt_scan_chosen_serial and I don’t believe fdt_path_offset does anything special with ‘:' > >> +#include "skeleton.dtsi" > > I'd like to get rid of skeleton.dtsi; it causes more problems than it > solves (the address/size cells mismatch is confusing and hidden, people > forget to fill in memory nodes appropriately, etc). > > Please remove this include and place appropriate #address-cells and #size-cells here. > > I'd strongly recommend going with /#size-cells = <2>; it' will save on a > lot of pain if you need to add PCIe or something with large ranges > later. If things all fall in 4GB within the SoC then have > /soc/#size=cells = <1> and an appropriate /soc/ranges property. > > I note this DT doesn't have any memory nodes. Is that an accident or > does the loader fill that in? it was coming out of skeleton.dtsi > > If the latter, have an empty node with a comment to that effect. I’ll kill off usage of skeleton.dtsi - k
On Fri, Mar 13, 2015 at 03:50:42PM +0000, Kumar Gala wrote: > > On Mar 13, 2015, at 5:52 AM, Mark Rutland <mark.rutland@arm.com> wrote: > > >> +/ { > >> + chosen { > >> + stdout-path = &blsp1_uart2; > >> + }; > > > > It would be good if we had the configuration too (see > > Documentation/devicetree/bindings/chosen.txt), as that avoids any > > reliance on kernel defaults. > > > > You can refer to an alias, so this could be: > > > > aliases { > > serial0 = &blsp1_uart2; > > }; > > > > chosen { > > stdout-path = "serial0:115200n8"; > > }; > > > > ...assuming that 115200n8 is correct for your UART, of course. > > > > > > […] > > Where is the code that actually handles this parsing? I’m not see it > in early_init_dt_scan_chosen_serial and I don’t believe > fdt_path_offset does anything special with ‘:' Take a look at commit 7914a7c5651a5161 ("of: support passing console options with stdout-path"). Early on of_alias_scan will find the options and in of_console_check we'll call add_preferred_console as appropriate. That'll be called in uart_add_one_port. > I’ll kill off usage of skeleton.dtsi Cheers. Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mar 13, 2015, at 11:25 AM, Mark Rutland <mark.rutland@arm.com> wrote: > On Fri, Mar 13, 2015 at 03:50:42PM +0000, Kumar Gala wrote: >> >> On Mar 13, 2015, at 5:52 AM, Mark Rutland <mark.rutland@arm.com> wrote: >> >>>> +/ { >>>> + chosen { >>>> + stdout-path = &blsp1_uart2; >>>> + }; >>> >>> It would be good if we had the configuration too (see >>> Documentation/devicetree/bindings/chosen.txt), as that avoids any >>> reliance on kernel defaults. >>> >>> You can refer to an alias, so this could be: >>> >>> aliases { >>> serial0 = &blsp1_uart2; >>> }; >>> >>> chosen { >>> stdout-path = "serial0:115200n8"; >>> }; >>> >>> ...assuming that 115200n8 is correct for your UART, of course. >>> >>> >>> […] >> >> Where is the code that actually handles this parsing? I’m not see it >> in early_init_dt_scan_chosen_serial and I don’t believe >> fdt_path_offset does anything special with ‘:' > > Take a look at commit 7914a7c5651a5161 ("of: support passing console options with > stdout-path"). > > Early on of_alias_scan will find the options and in of_console_check > we'll call add_preferred_console as appropriate. That'll be called in > uart_add_one_port. Ok, but earlycon dt code doesn’t utilize this, as its setup is before we unflatten the dt. So it breaks earlycon parsing right now, I’ll look at fixing that. - k
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index e0350ca..8517f15 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -5,5 +5,6 @@ dts-dirs += cavium dts-dirs += exynos dts-dirs += freescale dts-dirs += mediatek +dts-dirs += qcom subdir-y := $(dts-dirs) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile new file mode 100644 index 0000000..360ec4c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dts b/arch/arm64/boot/dts/qcom/msm8916-mtp.dts new file mode 100644 index 0000000..784ad92 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dts @@ -0,0 +1,21 @@ +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 and +* only version 2 as published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +/dts-v1/; + +#include "msm8916-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MSM 8916 MTP"; + compatible = "qcom,msm8916-mtp", "qcom,msm8916-mtp-smb1360", + "qcom,msm8916", "qcom,mtp"; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi new file mode 100644 index 0000000..270ba55 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi @@ -0,0 +1,28 @@ +/* Copyright (c) 2014-2014, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "msm8916.dtsi" + +/ { + chosen { + stdout-path = &blsp1_uart2; + }; + + soc { + serial@78b0000 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_uart2_default>; + pinctrl-1 = <&blsp1_uart2_sleep>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi new file mode 100644 index 0000000..8c8fd49 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -0,0 +1,183 @@ +/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "skeleton.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/qcom,gcc-msm8916.h> +#include <dt-bindings/reset/qcom,gcc-msm8916.h> + +/ { + model = "Qualcomm Technologies, Inc. MSM8916"; + compatible = "qcom,msm8916"; + + interrupt-parent = <&intc>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x1>; + }; + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x2>; + }; + + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x3>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + soc: soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + pinctrl@1000000 { + compatible = "qcom,msm8916-pinctrl"; + reg = <0x1000000 0x300000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + blsp1_uart2_default: blsp1_uart2_default { + pinmux { + function = "blsp_uart2"; + pins = "gpio4", "gpio5"; + }; + pinconf { + pins = "gpio4", "gpio5"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp1_uart2_sleep: blsp1_uart2_sleep { + pinmux { + function = "blsp_uart2"; + pins = "gpio4", "gpio5"; + }; + pinconf { + pins = "gpio4", "gpio5"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; + + gcc: qcom,gcc@1800000 { + compatible = "qcom,gcc-msm8916"; + #clock-cells = <1>; + #reset-cells = <1>; + reg = <0x1800000 0x80000>; + }; + + blsp1_uart2: serial@78b0000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x78b0000 0x200>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + intc: interrupt-controller@b000000 { + compatible = "qcom,msm-qgic2"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>; + }; + + timer@b020000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0xb020000 0x1000>; + clock-frequency = <19200000>; + + frame@b021000 { + frame-number = <0>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb021000 0x1000>, + <0xb022000 0x1000>; + }; + + frame@b023000 { + frame-number = <1>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb023000 0x1000>; + status = "disabled"; + }; + + frame@b024000 { + frame-number = <2>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb024000 0x1000>; + status = "disabled"; + }; + + frame@b025000 { + frame-number = <3>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb025000 0x1000>; + status = "disabled"; + }; + + frame@b026000 { + frame-number = <4>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb026000 0x1000>; + status = "disabled"; + }; + + frame@b027000 { + frame-number = <5>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb027000 0x1000>; + status = "disabled"; + }; + + frame@b028000 { + frame-number = <6>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb028000 0x1000>; + status = "disabled"; + }; + }; + }; +};
Add initial device tree support for Qualcomm MSM8916 SoC and MTP8916 evaluation board. At the current time we only boot up a single processor. Signed-off-by: Kumar Gala <galak@codeaurora.org> --- v4: * Added chosen node so we dont need to spec everything for earlycon * fixed up timer node to armv8, dropped clock-frequency v3: * Removed qcom,msm-id and qcom,board-id * Added top level compat for "qcom,msm8916-mtp-smb1360" v2: * Updated to dropping CONFIG_ARCH_QCOM_MSM8916 * Updated to use qcom-ids.h arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/qcom/Makefile | 5 + arch/arm64/boot/dts/qcom/msm8916-mtp.dts | 21 ++++ arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 28 +++++ arch/arm64/boot/dts/qcom/msm8916.dtsi | 183 ++++++++++++++++++++++++++++++ 5 files changed, 238 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/Makefile create mode 100644 arch/arm64/boot/dts/qcom/msm8916-mtp.dts create mode 100644 arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi create mode 100644 arch/arm64/boot/dts/qcom/msm8916.dtsi