diff mbox

[2/2] ARM: dts: sunxi: Remove overclocked/overvoltaged OPP

Message ID 1426732773-7179-3-git-send-email-wens@csie.org (mailing list archive)
State New, archived
Headers show

Commit Message

Chen-Yu Tsai March 19, 2015, 2:39 a.m. UTC
Without proper regulator support for individual boards, it is dangerous
to have overclocked/overvoltaged OPPs in the list. Cpufreq will increase
the frequency without the accompanying voltage increase, resulting in
an unstable system.

Remove them for now. We can revisit them with the new version of OPP
bindings, which support boost settings and frequency ranges, among
other things.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun5i-a13.dtsi | 3 +--
 arch/arm/boot/dts/sun7i-a20.dtsi | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

Comments

Siarhei Siamashka March 19, 2015, 6:59 a.m. UTC | #1
On Thu, 19 Mar 2015 10:39:33 +0800
Chen-Yu Tsai <wens@csie.org> wrote:

> Without proper regulator support for individual boards, it is dangerous
> to have overclocked/overvoltaged OPPs in the list. Cpufreq will increase
> the frequency without the accompanying voltage increase, resulting in
> an unstable system.
> 
> Remove them for now. We can revisit them with the new version of OPP
> bindings, which support boost settings and frequency ranges, among
> other things.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm/boot/dts/sun5i-a13.dtsi | 3 +--
>  arch/arm/boot/dts/sun7i-a20.dtsi | 3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)

What about the sun4i-a10.dtsi file? Was it forgotten or skipped
deliberately?
Chen-Yu Tsai March 19, 2015, 7:11 a.m. UTC | #2
On Thu, Mar 19, 2015 at 2:59 PM, Siarhei Siamashka
<siarhei.siamashka@gmail.com> wrote:
> On Thu, 19 Mar 2015 10:39:33 +0800
> Chen-Yu Tsai <wens@csie.org> wrote:
>
>> Without proper regulator support for individual boards, it is dangerous
>> to have overclocked/overvoltaged OPPs in the list. Cpufreq will increase
>> the frequency without the accompanying voltage increase, resulting in
>> an unstable system.
>>
>> Remove them for now. We can revisit them with the new version of OPP
>> bindings, which support boost settings and frequency ranges, among
>> other things.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>  arch/arm/boot/dts/sun5i-a13.dtsi | 3 +--
>>  arch/arm/boot/dts/sun7i-a20.dtsi | 3 +--
>>  2 files changed, 2 insertions(+), 4 deletions(-)
>
> What about the sun4i-a10.dtsi file? Was it forgotten or skipped
> deliberately?

sun4i-a10.dtsi does not have any overclocked/overvoltaged settings.
The highest setting is 1008MHz @ 1.4V.

ChenYu
Chen-Yu Tsai March 19, 2015, 8:14 a.m. UTC | #3
On Thu, Mar 19, 2015 at 3:11 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Thu, Mar 19, 2015 at 2:59 PM, Siarhei Siamashka
> <siarhei.siamashka@gmail.com> wrote:
>> On Thu, 19 Mar 2015 10:39:33 +0800
>> Chen-Yu Tsai <wens@csie.org> wrote:
>>
>>> Without proper regulator support for individual boards, it is dangerous
>>> to have overclocked/overvoltaged OPPs in the list. Cpufreq will increase
>>> the frequency without the accompanying voltage increase, resulting in
>>> an unstable system.
>>>
>>> Remove them for now. We can revisit them with the new version of OPP
>>> bindings, which support boost settings and frequency ranges, among
>>> other things.
>>>
>>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>>> ---
>>>  arch/arm/boot/dts/sun5i-a13.dtsi | 3 +--
>>>  arch/arm/boot/dts/sun7i-a20.dtsi | 3 +--
>>>  2 files changed, 2 insertions(+), 4 deletions(-)
>>
>> What about the sun4i-a10.dtsi file? Was it forgotten or skipped
>> deliberately?
>
> sun4i-a10.dtsi does not have any overclocked/overvoltaged settings.
> The highest setting is 1008MHz @ 1.4V.

Oops. Sorry. I missed it. Will send v2.

ChenYu
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 5d9ce84486bb..39264f7c7ae6 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -140,7 +140,6 @@ 
 	clock-latency = <244144>; /* 8 32k periods */
 	operating-points = <
 		/* kHz    uV */
-		1104000	1500000
 		1008000 1400000
 		912000  1350000
 		864000  1300000
@@ -150,7 +149,7 @@ 
 		>;
 	#cooling-cells = <2>;
 	cooling-min-level = <0>;
-	cooling-max-level = <6>;
+	cooling-max-level = <5>;
 };
 
 &ehci0 {
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 3a8530b79f1c..fdd181792b4b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -105,7 +105,6 @@ 
 			clock-latency = <244144>; /* 8 32k periods */
 			operating-points = <
 				/* kHz    uV */
-				1008000 1450000
 				960000  1400000
 				912000  1400000
 				864000  1300000
@@ -116,7 +115,7 @@ 
 				>;
 			#cooling-cells = <2>;
 			cooling-min-level = <0>;
-			cooling-max-level = <7>;
+			cooling-max-level = <6>;
 		};
 
 		cpu@1 {