| Message ID | 1430408363-20905-9-git-send-email-damien.lespiau@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6301
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 276/276 276/276
ILK 302/302 302/302
SNB 316/316 316/316
IVB 264/264 264/264
BYT -3 227/227 224/227
BDW 318/318 318/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*BYT igt@gem_dummy_reloc_loop@render FAIL(1)PASS(18) TIMEOUT(1)PASS(1)
BYT igt@gem_pipe_control_store_loop@fresh-buffer FAIL(1)TIMEOUT(10)PASS(9) TIMEOUT(1)PASS(1)
*BYT igt@gem_pwrite_pread@uncached-copy-performance FAIL(1)PASS(2) DMESG_FAIL(1)PASS(1)
(dmesg patch applied)drm:i915_context_is_banned[i915]]*ERROR*gpu_hanging_too_fast,banning@gpu hanging too
Note: You need to pay more attention to line start with '*'
On Thu, Apr 30, 2015 at 04:39:23PM +0100, Damien Lespiau wrote: > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index f637667..25618fd 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2422,8 +2422,7 @@ struct drm_i915_cmd_table { > #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ > IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \ > IS_SKYLAKE(dev)) > -#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ > - IS_BROADWELL(dev) || IS_VALLEYVIEW(dev)) > +#define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->gen >= 6) I really wanted to cook up some kind of tool to actually verify we don't lose some important registers due to D3/S0ix on each platform, but doesn't look like I'll find enough time for that anytime soon, so might as well flip the switch and hope for the best. IVB,SKL and BXT are the only ones missing in any case. I won't pretend that I've reviewed this as that would require me to cook up that tool, but I can toss in an ack. Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6) > #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev)) > > -- > 2.1.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Thu, Apr 30, 2015 at 04:39:23PM +0100, Damien Lespiau wrote: > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index f637667..25618fd 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2422,8 +2422,7 @@ struct drm_i915_cmd_table { > #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ > IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \ > IS_SKYLAKE(dev)) > -#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ > - IS_BROADWELL(dev) || IS_VALLEYVIEW(dev)) > +#define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->gen >= 6) > #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6) > #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev)) iirc ilk fdi lane sharing won't get restored correctly, at least that was the case way back. Have you double-checked that that still works on an ivb? Ander has a testcase and setup for it ... -Daniel
On Wed, May 06, 2015 at 12:54:23PM +0200, Daniel Vetter wrote: > On Thu, Apr 30, 2015 at 04:39:23PM +0100, Damien Lespiau wrote: > > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.h | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index f637667..25618fd 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -2422,8 +2422,7 @@ struct drm_i915_cmd_table { > > #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ > > IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \ > > IS_SKYLAKE(dev)) > > -#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ > > - IS_BROADWELL(dev) || IS_VALLEYVIEW(dev)) > > +#define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->gen >= 6) > > #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6) > > #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev)) > > iirc ilk fdi lane sharing won't get restored correctly, at least that was > the case way back. Have you double-checked that that still works on an > ivb? Ander has a testcase and setup for it ... It wasn't my intention at all to change the behaviour here, I just forgot about IVB... As it was just to reduce the number of conditions, might as well make it a device info flag.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f637667..25618fd 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2422,8 +2422,7 @@ struct drm_i915_cmd_table { #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \ IS_SKYLAKE(dev)) -#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ - IS_BROADWELL(dev) || IS_VALLEYVIEW(dev)) +#define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->gen >= 6) #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6) #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev))
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)