diff mbox

intel_pstate: set BYT MSR with wrmsrl_on_cpu()

Message ID 1431442782-12061-1-git-send-email-joe.konno@linux.intel.com (mailing list archive)
State Accepted, archived
Delegated to: Rafael Wysocki
Headers show

Commit Message

Joe Konno May 12, 2015, 2:59 p.m. UTC
From: Joe Konno <joe.konno@intel.com>

Commit 007bea098b86 (intel_pstate: Add setting voltage value for
baytrail P states.) introduced byt_set_pstate() with the assumption that
it would always be run by the CPU whose MSR is to be written by it.  It
turns out, however, that is not always the case in practice, so modify
byt_set_pstate() to enforce the MSR write done by it to always happen on
the right CPU.

v2: better commit message, remove For: tag

Fixes: 007bea098b86 ("intel_pstate: Add setting voltage value for
       baytrail P states.")
Signed-off-by: Joe Konno <joe.konno@intel.com>
---
 drivers/cpufreq/intel_pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Rafael J. Wysocki May 15, 2015, 12:13 a.m. UTC | #1
On Tuesday, May 12, 2015 07:59:42 AM Joe Konno wrote:
> From: Joe Konno <joe.konno@intel.com>
> 
> Commit 007bea098b86 (intel_pstate: Add setting voltage value for
> baytrail P states.) introduced byt_set_pstate() with the assumption that
> it would always be run by the CPU whose MSR is to be written by it.  It
> turns out, however, that is not always the case in practice, so modify
> byt_set_pstate() to enforce the MSR write done by it to always happen on
> the right CPU.
> 
> v2: better commit message, remove For: tag
> 
> Fixes: 007bea098b86 ("intel_pstate: Add setting voltage value for
>        baytrail P states.")
> Signed-off-by: Joe Konno <joe.konno@intel.com>
> ---
>  drivers/cpufreq/intel_pstate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index 6414661ac1c4..c45d274a75c8 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -535,7 +535,7 @@ static void byt_set_pstate(struct cpudata *cpudata, int pstate)
>  
>  	val |= vid;
>  
> -	wrmsrl(MSR_IA32_PERF_CTL, val);
> +	wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
>  }
>  
>  #define BYT_BCLK_FREQS 5

Queued up for 4.2, thanks!
diff mbox

Patch

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 6414661ac1c4..c45d274a75c8 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -535,7 +535,7 @@  static void byt_set_pstate(struct cpudata *cpudata, int pstate)
 
 	val |= vid;
 
-	wrmsrl(MSR_IA32_PERF_CTL, val);
+	wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
 }
 
 #define BYT_BCLK_FREQS 5