| Message ID | 1431716234-22100-1-git-send-email-damien.lespiau@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, May 15, 2015 at 07:57:13PM +0100, Damien Lespiau wrote: > We decided that liked the explicit list of IDs better than the encoded > one. The DDX may like this as well, if just to keep the files identical. The point is that it is an exact copy. I have been referencing the kernel commit that we sync to each time, e.g. commit abc9b3f5753d602da296d50c8769cefb88ec473d Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Fri Sep 26 09:22:50 2014 +0100 Add Skylake PCI IDs From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625 Author: Damien Lespiau <damien.lespiau@intel.com> Date: Wed Feb 13 15:27:37 2013 +0000 drm/i915/skl: Add the Skylake PCI ids Just do the same for adding Boxton PCI ids, and give them .gen = 0111 -Chris
On Fri, May 15, 2015 at 09:30:10PM +0100, Chris Wilson wrote: > On Fri, May 15, 2015 at 07:57:13PM +0100, Damien Lespiau wrote: > > We decided that liked the explicit list of IDs better than the encoded > > one. The DDX may like this as well, if just to keep the files identical. > > The point is that it is an exact copy. I have been referencing the > kernel commit that we sync to each time, e.g. > > commit abc9b3f5753d602da296d50c8769cefb88ec473d > Author: Chris Wilson <chris@chris-wilson.co.uk> > Date: Fri Sep 26 09:22:50 2014 +0100 > > Add Skylake PCI IDs > > From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625 > Author: Damien Lespiau <damien.lespiau@intel.com> > Date: Wed Feb 13 15:27:37 2013 +0000 > > drm/i915/skl: Add the Skylake PCI ids > > Just do the same for adding Boxton PCI ids, and give them .gen = 0111 I guess we'll have to wait for the BXT kernel patch to have a real hash?
On Mon, May 18, 2015 at 12:49:30PM +0100, Damien Lespiau wrote: > On Fri, May 15, 2015 at 09:30:10PM +0100, Chris Wilson wrote: > > On Fri, May 15, 2015 at 07:57:13PM +0100, Damien Lespiau wrote: > > > We decided that liked the explicit list of IDs better than the encoded > > > one. The DDX may like this as well, if just to keep the files identical. > > > > The point is that it is an exact copy. I have been referencing the > > kernel commit that we sync to each time, e.g. > > > > commit abc9b3f5753d602da296d50c8769cefb88ec473d > > Author: Chris Wilson <chris@chris-wilson.co.uk> > > Date: Fri Sep 26 09:22:50 2014 +0100 > > > > Add Skylake PCI IDs > > > > From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625 > > Author: Damien Lespiau <damien.lespiau@intel.com> > > Date: Wed Feb 13 15:27:37 2013 +0000 > > > > drm/i915/skl: Add the Skylake PCI ids > > > > Just do the same for adding Boxton PCI ids, and give them .gen = 0111 > > I guess we'll have to wait for the BXT kernel patch to have a real hash? Yes, I like the cascade of authority from the kernel. -Chris
diff --git a/src/i915_pciids.h b/src/i915_pciids.h index f2e47fd..6133723 100644 --- a/src/i915_pciids.h +++ b/src/i915_pciids.h @@ -208,40 +208,41 @@ #define INTEL_VLV_D_IDS(info) \ INTEL_VGA_DEVICE(0x0155, info) -#define _INTEL_BDW_M(gt, id, info) \ - INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) -#define _INTEL_BDW_D(gt, id, info) \ - INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) - -#define _INTEL_BDW_M_IDS(gt, info) \ - _INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \ - _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \ - _INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \ - _INTEL_BDW_M(gt, 0x160E, info) /* ULX */ - -#define _INTEL_BDW_D_IDS(gt, info) \ - _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \ - _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */ - -#define INTEL_BDW_GT12M_IDS(info) \ - _INTEL_BDW_M_IDS(1, info), \ - _INTEL_BDW_M_IDS(2, info) +#define INTEL_BDW_GT12M_IDS(info) \ + INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \ + INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \ + INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \ + INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \ + INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ + INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \ + INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \ + INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */ #define INTEL_BDW_GT12D_IDS(info) \ - _INTEL_BDW_D_IDS(1, info), \ - _INTEL_BDW_D_IDS(2, info) + INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ + INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \ + INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \ + INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */ #define INTEL_BDW_GT3M_IDS(info) \ - _INTEL_BDW_M_IDS(3, info) + INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \ + INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \ + INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \ + INTEL_VGA_DEVICE(0x162E, info) /* ULX */ #define INTEL_BDW_GT3D_IDS(info) \ - _INTEL_BDW_D_IDS(3, info) + INTEL_VGA_DEVICE(0x162A, info), /* Server */ \ + INTEL_VGA_DEVICE(0x162D, info) /* Workstation */ #define INTEL_BDW_RSVDM_IDS(info) \ - _INTEL_BDW_M_IDS(4, info) + INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \ + INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \ + INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \ + INTEL_VGA_DEVICE(0x163E, info) /* ULX */ #define INTEL_BDW_RSVDD_IDS(info) \ - _INTEL_BDW_D_IDS(4, info) + INTEL_VGA_DEVICE(0x163A, info), /* Server */ \ + INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ #define INTEL_BDW_M_IDS(info) \ INTEL_BDW_GT12M_IDS(info), \
We decided that liked the explicit list of IDs better than the encoded one. The DDX may like this as well, if just to keep the files identical. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- src/i915_pciids.h | 49 +++++++++++++++++++++++++------------------------ 1 file changed, 25 insertions(+), 24 deletions(-)