diff mbox

[v2] drm/i915: Limit CHV max cdclk

Message ID 1434009243-30656-2-git-send-email-mika.kahola@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Mika Kahola June 11, 2015, 7:54 a.m. UTC
Limit CHV maximum cdclk to 320MHz.

v2: Rebase to the latest

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jani Nikula June 11, 2015, 9:03 a.m. UTC | #1
On Thu, 11 Jun 2015, Mika Kahola <mika.kahola@intel.com> wrote:
> Limit CHV maximum cdclk to 320MHz.
>
> v2: Rebase to the latest
>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c38c297..ab40d04 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5647,7 +5647,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
>  		else
>  			dev_priv->max_cdclk_freq = 675000;
>  	} else if (IS_VALLEYVIEW(dev)) {
> -		dev_priv->max_cdclk_freq = 400000;
> +		dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;

I'd rather make this:

  	} else if (IS_CHERRYVIEW(dev)) {
		dev_priv->max_cdclk_freq = 320000;
 	} else if (IS_VALLEYVIEW(dev)) {
		dev_priv->max_cdclk_freq = 400000;
	} else {

BR,
Jani.

>  		/* otherwise assume cdclk is fixed */
>  		dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;
> -- 
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Mika Kahola June 11, 2015, 9:29 a.m. UTC | #2
On Thu, 2015-06-11 at 12:03 +0300, Jani Nikula wrote:
> On Thu, 11 Jun 2015, Mika Kahola <mika.kahola@intel.com> wrote:
> > Limit CHV maximum cdclk to 320MHz.
> >
> > v2: Rebase to the latest
> >
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index c38c297..ab40d04 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5647,7 +5647,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
> >  		else
> >  			dev_priv->max_cdclk_freq = 675000;
> >  	} else if (IS_VALLEYVIEW(dev)) {
> > -		dev_priv->max_cdclk_freq = 400000;
> > +		dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;
> 
> I'd rather make this:
> 
>   	} else if (IS_CHERRYVIEW(dev)) {
> 		dev_priv->max_cdclk_freq = 320000;
>  	} else if (IS_VALLEYVIEW(dev)) {
> 		dev_priv->max_cdclk_freq = 400000;
> 	} else {
> 
> BR,
> Jani.

It's probably more readable that way. I'll revise the patch.

Cheers,
Mika

> 
> >  		/* otherwise assume cdclk is fixed */
> >  		dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;
> > -- 
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
Shuang He June 14, 2015, 4:14 p.m. UTC | #3
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6567
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  303/303              303/303
SNB                                  312/312              312/312
IVB                                  343/343              343/343
BYT                                  287/287              287/287
BDW                                  321/321              321/321
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
Note: You need to pay more attention to line start with '*'
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c38c297..ab40d04 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5647,7 +5647,7 @@  static void intel_update_max_cdclk(struct drm_device *dev)
 		else
 			dev_priv->max_cdclk_freq = 675000;
 	} else if (IS_VALLEYVIEW(dev)) {
-		dev_priv->max_cdclk_freq = 400000;
+		dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;
 	} else {
 		/* otherwise assume cdclk is fixed */
 		dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;