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[v2] drm/i915/skl: Skip remaining dividers when deviation is 0

Message ID 1435340069-3062-1-git-send-email-damien.lespiau@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Lespiau, Damien June 26, 2015, 5:34 p.m. UTC
We can't improve a 0 deviation, so when we find such a divider, skip the
remaining ones they won't be better.

This short-circuit the search for 34 of the 373 test frequencies in the
corresponding i-g-t test (tools/skl_compute_wrpll)

v2: Place the short-circuiting code in skl_compute_wrpll() (Paulo)

(I'm sure nobody will notice the spurious removal of a blank line)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

Daniel Vetter June 26, 2015, 5:42 p.m. UTC | #1
On Fri, Jun 26, 2015 at 06:34:29PM +0100, Damien Lespiau wrote:
> We can't improve a 0 deviation, so when we find such a divider, skip the
> remaining ones they won't be better.
> 
> This short-circuit the search for 34 of the 373 test frequencies in the
> corresponding i-g-t test (tools/skl_compute_wrpll)
> 
> v2: Place the short-circuiting code in skl_compute_wrpll() (Paulo)
> 
> (I'm sure nobody will notice the spurious removal of a blank line)
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index f6b3ccc..42c1487 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1149,7 +1149,6 @@ static void skl_wrpll_try_divider(struct skl_wrpll_context *ctx,
>  		ctx->dco_freq = dco_freq;
>  		ctx->p = divider;
>  	}
> -
>  }
>  
>  static void skl_wrpll_get_multipliers(unsigned int p,
> @@ -1315,9 +1314,17 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
>  						      dco_central_freq[dco],
>  						      dco_freq,
>  						      p);
> +				/*
> +				 * Skip the remaining dividers if we're sure to
> +				 * have found the definitive divider, we can't
> +				 * improve a 0 deviation.
> +				 */
> +				if (ctx.min_deviation == 0)
> +					goto skip_remaining_dividers;
>  			}
>  		}
>  
> +skip_remaining_dividers:
>  		/*
>  		 * If a solution is found with an even divider, prefer
>  		 * this one.
> -- 
> 2.1.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Shuang He June 28, 2015, 7:15 p.m. UTC | #2
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6627
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                                  302/302              302/302
SNB                                  312/316              312/316
IVB                                  343/343              343/343
BYT                 -1              287/287              286/287
HSW                                  380/380              380/380
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*BYT  igt@gem_partial_pwrite_pread@reads-display      PASS(1)      FAIL(1)
Note: You need to pay more attention to line start with '*'
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index f6b3ccc..42c1487 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1149,7 +1149,6 @@  static void skl_wrpll_try_divider(struct skl_wrpll_context *ctx,
 		ctx->dco_freq = dco_freq;
 		ctx->p = divider;
 	}
-
 }
 
 static void skl_wrpll_get_multipliers(unsigned int p,
@@ -1315,9 +1314,17 @@  skl_ddi_calculate_wrpll(int clock /* in Hz */,
 						      dco_central_freq[dco],
 						      dco_freq,
 						      p);
+				/*
+				 * Skip the remaining dividers if we're sure to
+				 * have found the definitive divider, we can't
+				 * improve a 0 deviation.
+				 */
+				if (ctx.min_deviation == 0)
+					goto skip_remaining_dividers;
 			}
 		}
 
+skip_remaining_dividers:
 		/*
 		 * If a solution is found with an even divider, prefer
 		 * this one.