| Message ID | 1436365487-19242-5-git-send-email-animesh.manna@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jul 08, 2015 at 07:54:45PM +0530, Animesh Manna wrote: > Firmware loading can be optimized by setting the dmc_present flag > for the first time and later internallly stored firmware data > can be used. > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_csr.c | 24 +++++++++++++++--------- > 2 files changed, 16 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 5ae45bd..4870666 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -746,6 +746,7 @@ struct intel_csr { > uint32_t mmio_count; > uint32_t mmioaddr[8]; > uint32_t mmiodata[8]; > + bool dmc_present; You can instead look at dev_priv->csr.dmc_payload, no need to add an additional variable. -Daniel > }; > > #define DEV_INFO_FOR_EACH_FLAG(func, sep) \ > diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c > index 8e9395f..d600640 100644 > --- a/drivers/gpu/drm/i915/intel_csr.c > +++ b/drivers/gpu/drm/i915/intel_csr.c > @@ -333,6 +333,7 @@ static void finish_csr_load(const struct firmware *fw, > > /* load csr program during system boot, as needed for DC states */ > intel_csr_load_program(dev); > + dev_priv->csr.dmc_present = true; > > DRM_DEBUG_KMS("Finished loading %s\n", dev_priv->csr.fw_path); > } > @@ -352,18 +353,22 @@ void intel_display_load_csr(struct drm_i915_private *dev_priv) > const struct firmware *fw; > int ret; > > - /* CSR supported for platform, load firmware */ > - ret = request_firmware(&fw, csr->fw_path, > - &dev_priv->dev->pdev->dev); > + if (dev_priv->csr.dmc_present) > + intel_csr_load_program(dev_priv->dev); > + else { > + /* CSR supported for platform, load firmware */ > + ret = request_firmware(&fw, csr->fw_path, > + &dev_priv->dev->pdev->dev); > > - DRM_DEBUG_KMS("Loading %s\n", csr->fw_path); > + DRM_DEBUG_KMS("Loading %s\n", csr->fw_path); > > - if (ret) { > - i915_firmware_load_error_print(csr->fw_path, ret); > - return; > + if (ret) { > + i915_firmware_load_error_print(csr->fw_path, ret); > + return; > + } > + finish_csr_load(fw, dev_priv); > + release_firmware(fw); > } > - finish_csr_load(fw, dev_priv); > - release_firmware(fw); > } > > /** > @@ -408,6 +413,7 @@ void intel_csr_ucode_fini(struct drm_device *dev) > return; > > flush_work(&dev_priv->csr.csr_work); > + dev_priv->csr.dmc_present = false; > > kfree(dev_priv->csr.dmc_payload); > } > -- > 2.0.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5ae45bd..4870666 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -746,6 +746,7 @@ struct intel_csr { uint32_t mmio_count; uint32_t mmioaddr[8]; uint32_t mmiodata[8]; + bool dmc_present; }; #define DEV_INFO_FOR_EACH_FLAG(func, sep) \ diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index 8e9395f..d600640 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -333,6 +333,7 @@ static void finish_csr_load(const struct firmware *fw, /* load csr program during system boot, as needed for DC states */ intel_csr_load_program(dev); + dev_priv->csr.dmc_present = true; DRM_DEBUG_KMS("Finished loading %s\n", dev_priv->csr.fw_path); } @@ -352,18 +353,22 @@ void intel_display_load_csr(struct drm_i915_private *dev_priv) const struct firmware *fw; int ret; - /* CSR supported for platform, load firmware */ - ret = request_firmware(&fw, csr->fw_path, - &dev_priv->dev->pdev->dev); + if (dev_priv->csr.dmc_present) + intel_csr_load_program(dev_priv->dev); + else { + /* CSR supported for platform, load firmware */ + ret = request_firmware(&fw, csr->fw_path, + &dev_priv->dev->pdev->dev); - DRM_DEBUG_KMS("Loading %s\n", csr->fw_path); + DRM_DEBUG_KMS("Loading %s\n", csr->fw_path); - if (ret) { - i915_firmware_load_error_print(csr->fw_path, ret); - return; + if (ret) { + i915_firmware_load_error_print(csr->fw_path, ret); + return; + } + finish_csr_load(fw, dev_priv); + release_firmware(fw); } - finish_csr_load(fw, dev_priv); - release_firmware(fw); } /** @@ -408,6 +413,7 @@ void intel_csr_ucode_fini(struct drm_device *dev) return; flush_work(&dev_priv->csr.csr_work); + dev_priv->csr.dmc_present = false; kfree(dev_priv->csr.dmc_payload); }
Firmware loading can be optimized by setting the dmc_present flag for the first time and later internallly stored firmware data can be used. Signed-off-by: Animesh Manna <animesh.manna@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_csr.c | 24 +++++++++++++++--------- 2 files changed, 16 insertions(+), 9 deletions(-)