Message ID | 55A4F9B6.1070904@nvidia.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Jul 14, 2015 at 12:59:50PM +0100, Jon Hunter wrote: > > > On 13/07/15 15:03, Jon Hunter wrote: > > > > > > On 13/07/15 14:50, Peter De Schrijver wrote: > >> On Mon, Jul 13, 2015 at 01:39:57PM +0100, Jon Hunter wrote: > >>> From: Vince Hsu <vinceh@nvidia.com> > >>> > >>> We have added generic power domain support for Tegra SoCs. So now the > >>> option M_GENERIC_DOMAINS must be enabled by default to have proper power > >> > >> Missing P :) > > > > Ooops. I think introduced that error. Will fix. > > Updated version ... > Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> > > From f7b951cd05973d74fc25e33a1aaec5a6e77bfdc0 Mon Sep 17 00:00:00 2001 > From: Vince Hsu <vinceh@nvidia.com> > Date: Wed, 11 Mar 2015 13:40:46 +0800 > Subject: [PATCH 19/19] ARM: tegra: select PM_GENERIC_DOMAINS > > We have added generic power domain support for Tegra SoCs. So now the > option PM_GENERIC_DOMAINS must be enabled by default to have proper power > sequence. > > Signed-off-by: Vince Hsu <vinceh@nvidia.com> > Signed-off-by: Jon Hunter <jonathanh@nvidia.com> > --- > arch/arm/mach-tegra/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig > index 0fa4c5f8b1be..fdf86cae3b32 100644 > --- a/arch/arm/mach-tegra/Kconfig > +++ b/arch/arm/mach-tegra/Kconfig > @@ -9,6 +9,7 @@ menuconfig ARCH_TEGRA > select HAVE_ARM_TWD if SMP > select PINCTRL > select PM_OPP > + select PM_GENERIC_DOMAINS if PM > select ARCH_HAS_RESET_CONTROLLER > select RESET_CONTROLLER > select SOC_BUS > -- > 2.1.4 >
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 0fa4c5f8b1be..fdf86cae3b32 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -9,6 +9,7 @@ menuconfig ARCH_TEGRA select HAVE_ARM_TWD if SMP select PINCTRL select PM_OPP + select PM_GENERIC_DOMAINS if PM select ARCH_HAS_RESET_CONTROLLER select RESET_CONTROLLER select SOC_BUS