diff mbox

[v6,05/19] drm/i915/gen8: Add dynamic page trace events

Message ID 1438187043-34267-6-git-send-email-michel.thierry@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michel Thierry July 29, 2015, 4:23 p.m. UTC 
The dynamic page allocation patch series added it for GEN6, this patch
adds them for GEN8.

v2: Consolidate pagetable/page_directory events
v3: Multiple rebases.
v4: Rebase after s/page_tables/page_table/.
v5: Rebase after Mika's ppgtt cleanup / scratch merge patch series.
v6: Rebase after gen8_map_pagetable_range removal.
v7: Use generic page name (px) in DECLARE_EVENT_CLASS (Akash)
v8: Defer define of i915_page_directory_pointer_entry_alloc (Akash)

Cc: Akash Goel <akash.goel@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v3+)
---
 drivers/gpu/drm/i915/i915_gem_gtt.c |  6 ++++++
 drivers/gpu/drm/i915/i915_trace.h   | 24 ++++++++++++++++--------
 2 files changed, 22 insertions(+), 8 deletions(-)

Comments

akash.goel@intel.com July 30, 2015, 3:48 a.m. UTC | #1 
Reviewed the patch & it looks fine.
Reviewed-by: "Akash Goel <akash.goel@intel.com>"

On 7/29/2015 9:53 PM, Michel Thierry wrote:
> The dynamic page allocation patch series added it for GEN6, this patch
> adds them for GEN8.
>
> v2: Consolidate pagetable/page_directory events
> v3: Multiple rebases.
> v4: Rebase after s/page_tables/page_table/.
> v5: Rebase after Mika's ppgtt cleanup / scratch merge patch series.
> v6: Rebase after gen8_map_pagetable_range removal.
> v7: Use generic page name (px) in DECLARE_EVENT_CLASS (Akash)
> v8: Defer define of i915_page_directory_pointer_entry_alloc (Akash)
>
> Cc: Akash Goel <akash.goel@intel.com>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v3+)
> ---
>   drivers/gpu/drm/i915/i915_gem_gtt.c |  6 ++++++
>   drivers/gpu/drm/i915/i915_trace.h   | 24 ++++++++++++++++--------
>   2 files changed, 22 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f338a13..8c1db92 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -844,6 +844,7 @@ static int gen8_ppgtt_alloc_pagetabs(struct i915_address_space *vm,
>   		gen8_initialize_pt(vm, pt);
>   		pd->page_table[pde] = pt;
>   		__set_bit(pde, new_pts);
> +		trace_i915_page_table_entry_alloc(vm, pde, start, GEN8_PDE_SHIFT);
>   	}
>
>   	return 0;
> @@ -904,6 +905,7 @@ gen8_ppgtt_alloc_page_directories(struct i915_address_space *vm,
>   		gen8_initialize_pd(vm, pd);
>   		pdp->page_directory[pdpe] = pd;
>   		__set_bit(pdpe, new_pds);
> +		trace_i915_page_directory_entry_alloc(vm, pdpe, start, GEN8_PDPE_SHIFT);
>   	}
>
>   	return 0;
> @@ -1053,6 +1055,10 @@ static int gen8_alloc_va_range(struct i915_address_space *vm,
>   			/* Map the PDE to the page table */
>   			page_directory[pde] = gen8_pde_encode(px_dma(pt),
>   							      I915_CACHE_LLC);
> +			trace_i915_page_table_entry_map(&ppgtt->base, pde, pt,
> +							gen8_pte_index(start),
> +							gen8_pte_count(start, length),
> +							GEN8_PTES);
>
>   			/* NB: We haven't yet mapped ptes to pages. At this
>   			 * point we're still relying on insert_entries() */
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index 2f34c47..f230d76 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -186,33 +186,41 @@ DEFINE_EVENT(i915_va, i915_va_alloc,
>   	     TP_ARGS(vm, start, length, name)
>   );
>
> -DECLARE_EVENT_CLASS(i915_page_table_entry,
> -	TP_PROTO(struct i915_address_space *vm, u32 pde, u64 start, u64 pde_shift),
> -	TP_ARGS(vm, pde, start, pde_shift),
> +DECLARE_EVENT_CLASS(i915_px_entry,
> +	TP_PROTO(struct i915_address_space *vm, u32 px, u64 start, u64 px_shift),
> +	TP_ARGS(vm, px, start, px_shift),
>
>   	TP_STRUCT__entry(
>   		__field(struct i915_address_space *, vm)
> -		__field(u32, pde)
> +		__field(u32, px)
>   		__field(u64, start)
>   		__field(u64, end)
>   	),
>
>   	TP_fast_assign(
>   		__entry->vm = vm;
> -		__entry->pde = pde;
> +		__entry->px = px;
>   		__entry->start = start;
> -		__entry->end = ((start + (1ULL << pde_shift)) & ~((1ULL << pde_shift)-1)) - 1;
> +		__entry->end = ((start + (1ULL << px_shift)) & ~((1ULL << px_shift)-1)) - 1;
>   	),
>
>   	TP_printk("vm=%p, pde=%d (0x%llx-0x%llx)",
> -		  __entry->vm, __entry->pde, __entry->start, __entry->end)
> +		  __entry->vm, __entry->px, __entry->start, __entry->end)
>   );
>
> -DEFINE_EVENT(i915_page_table_entry, i915_page_table_entry_alloc,
> +DEFINE_EVENT(i915_px_entry, i915_page_table_entry_alloc,
>   	     TP_PROTO(struct i915_address_space *vm, u32 pde, u64 start, u64 pde_shift),
>   	     TP_ARGS(vm, pde, start, pde_shift)
>   );
>
> +DEFINE_EVENT_PRINT(i915_px_entry, i915_page_directory_entry_alloc,
> +		   TP_PROTO(struct i915_address_space *vm, u32 pdpe, u64 start, u64 pdpe_shift),
> +		   TP_ARGS(vm, pdpe, start, pdpe_shift),
> +
> +		   TP_printk("vm=%p, pdpe=%d (0x%llx-0x%llx)",
> +			     __entry->vm, __entry->px, __entry->start, __entry->end)
> +);
> +
>   /* Avoid extra math because we only support two sizes. The format is defined by
>    * bitmap_scnprintf. Each 32 bits is 8 HEX digits followed by comma */
>   #define TRACE_PT_SIZE(bits) \
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f338a13..8c1db92 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -844,6 +844,7 @@  static int gen8_ppgtt_alloc_pagetabs(struct i915_address_space *vm,
 		gen8_initialize_pt(vm, pt);
 		pd->page_table[pde] = pt;
 		__set_bit(pde, new_pts);
+		trace_i915_page_table_entry_alloc(vm, pde, start, GEN8_PDE_SHIFT);
 	}
 
 	return 0;
@@ -904,6 +905,7 @@  gen8_ppgtt_alloc_page_directories(struct i915_address_space *vm,
 		gen8_initialize_pd(vm, pd);
 		pdp->page_directory[pdpe] = pd;
 		__set_bit(pdpe, new_pds);
+		trace_i915_page_directory_entry_alloc(vm, pdpe, start, GEN8_PDPE_SHIFT);
 	}
 
 	return 0;
@@ -1053,6 +1055,10 @@  static int gen8_alloc_va_range(struct i915_address_space *vm,
 			/* Map the PDE to the page table */
 			page_directory[pde] = gen8_pde_encode(px_dma(pt),
 							      I915_CACHE_LLC);
+			trace_i915_page_table_entry_map(&ppgtt->base, pde, pt,
+							gen8_pte_index(start),
+							gen8_pte_count(start, length),
+							GEN8_PTES);
 
 			/* NB: We haven't yet mapped ptes to pages. At this
 			 * point we're still relying on insert_entries() */
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index 2f34c47..f230d76 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -186,33 +186,41 @@  DEFINE_EVENT(i915_va, i915_va_alloc,
 	     TP_ARGS(vm, start, length, name)
 );
 
-DECLARE_EVENT_CLASS(i915_page_table_entry,
-	TP_PROTO(struct i915_address_space *vm, u32 pde, u64 start, u64 pde_shift),
-	TP_ARGS(vm, pde, start, pde_shift),
+DECLARE_EVENT_CLASS(i915_px_entry,
+	TP_PROTO(struct i915_address_space *vm, u32 px, u64 start, u64 px_shift),
+	TP_ARGS(vm, px, start, px_shift),
 
 	TP_STRUCT__entry(
 		__field(struct i915_address_space *, vm)
-		__field(u32, pde)
+		__field(u32, px)
 		__field(u64, start)
 		__field(u64, end)
 	),
 
 	TP_fast_assign(
 		__entry->vm = vm;
-		__entry->pde = pde;
+		__entry->px = px;
 		__entry->start = start;
-		__entry->end = ((start + (1ULL << pde_shift)) & ~((1ULL << pde_shift)-1)) - 1;
+		__entry->end = ((start + (1ULL << px_shift)) & ~((1ULL << px_shift)-1)) - 1;
 	),
 
 	TP_printk("vm=%p, pde=%d (0x%llx-0x%llx)",
-		  __entry->vm, __entry->pde, __entry->start, __entry->end)
+		  __entry->vm, __entry->px, __entry->start, __entry->end)
 );
 
-DEFINE_EVENT(i915_page_table_entry, i915_page_table_entry_alloc,
+DEFINE_EVENT(i915_px_entry, i915_page_table_entry_alloc,
 	     TP_PROTO(struct i915_address_space *vm, u32 pde, u64 start, u64 pde_shift),
 	     TP_ARGS(vm, pde, start, pde_shift)
 );
 
+DEFINE_EVENT_PRINT(i915_px_entry, i915_page_directory_entry_alloc,
+		   TP_PROTO(struct i915_address_space *vm, u32 pdpe, u64 start, u64 pdpe_shift),
+		   TP_ARGS(vm, pdpe, start, pdpe_shift),
+
+		   TP_printk("vm=%p, pdpe=%d (0x%llx-0x%llx)",
+			     __entry->vm, __entry->px, __entry->start, __entry->end)
+);
+
 /* Avoid extra math because we only support two sizes. The format is defined by
  * bitmap_scnprintf. Each 32 bits is 8 HEX digits followed by comma */
 #define TRACE_PT_SIZE(bits) \