diff mbox

[09/25,v7,RFC] arm64: renesas: r8a7795: Add SCIF2 support

Message ID 87fv3977aa.wl%kuninori.morimoto.gx@renesas.com (mailing list archive)
State RFC
Headers show

Commit Message

Kuninori Morimoto Aug. 24, 2015, 2:28 a.m. UTC
From: Gaku Inami <gaku.inami.xw@bp.renesas.com>

This patch enables SCIF2
Gaku Inami <gaku.inami.xw@bp.renesas.com> created original patch,
and Kuninori updated DTSI

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
v5 -> v7

 - mstp is using clock-output-names
   (driver is requesting it)

 arch/arm64/boot/dts/renesas/r8a7795.dtsi  | 23 +++++++++++++++++++++++
 include/dt-bindings/clock/r8a7795-clock.h |  1 +
 2 files changed, 24 insertions(+)

Comments

Geert Uytterhoeven Aug. 24, 2015, 12:48 p.m. UTC | #1
On Mon, Aug 24, 2015 at 4:28 AM, Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi

> +               scif2: serial@e6e88000 {
> +                       compatible = "renesas,scif-r8a7795", "renesas,scif";
> +                       reg = <0 0xe6e88000 0 64>;
> +                       interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&mstp3_clks R8A7795_CLK_SCIF2>;
> +                       clock-names = "sci_ick";

status = "disabled;"

Sorry for not noticing before.

> +               };

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

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                                -- Linus Torvalds
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diff mbox

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 9b3fcf3..150b146 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -79,13 +79,36 @@ 
 			};
 
 			cpg_clocks: cpg_clocks@e6150000 {
+				#address-cells = <2>;
+				#size-cells = <2>;
+				#clock-cells = <1>;
+				ranges;
+
 				compatible = "renesas,r8a7795-cpg-clocks",
 					     "renesas,rcar-gen3-cpg-clocks";
 				reg = <0 0xe6150000 0 0x1000>;
 				clocks = <&extal_clk>;
 				clock-output-names = "main", "pll0", "pll1","pll2",
 						     "pll3", "pll4";
+
+				mstp3_clks: mstp3_clks@e615013c {
+					compatible = "renesas,r8a7795-mstp-clocks",
+					             "renesas,cpg-mstp-clocks";
+					reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+					clocks =  <&s3d4_clk>;
+					#clock-cells = <1>;
+					renesas,clock-indices = <R8A7795_CLK_SCIF2>;
+					clock-output-names = "scif2";
+				};
 			};
 		};
+
+		scif2: serial@e6e88000 {
+			compatible = "renesas,scif-r8a7795", "renesas,scif";
+			reg = <0 0xe6e88000 0 64>;
+			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7795_CLK_SCIF2>;
+			clock-names = "sci_ick";
+		};
 	};
 };
diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h
index 334fa13..27b3a29 100644
--- a/include/dt-bindings/clock/r8a7795-clock.h
+++ b/include/dt-bindings/clock/r8a7795-clock.h
@@ -24,6 +24,7 @@ 
 /* MSTP2 */
 
 /* MSTP3 */
+#define R8A7795_CLK_SCIF2		10
 
 /* MSTP5 */