diff mbox

[PATCH/RFC,v2,2/5] arm64: dts: r8a7795: add EthernetAVB device node

Message ID 1441936996-18437-3-git-send-email-horms+renesas@verge.net.au (mailing list archive)
State RFC
Delegated to: Simon Horman
Headers show

Commit Message

Simon Horman Sept. 11, 2015, 2:03 a.m. UTC
From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[horms: minor updates]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

---

v0 [Kazuya Mizuguchi]

v1 [Simon Horman]
* moved to soc node
* updated patch subject

v2 [Simon Horman]
* Specify all interrupts
* Use named interrupts
* Rebase
* Remove spurious whitespace change introduce in v1
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 41 ++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

Comments

Geert Uytterhoeven Sept. 11, 2015, 7:26 a.m. UTC | #1
On Fri, Sep 11, 2015 at 4:03 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
>
> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> [horms: minor updates]
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Geert Uytterhoeven Sept. 15, 2015, 1:58 p.m. UTC | #2
On Fri, Sep 11, 2015 at 4:03 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -297,6 +297,47 @@
>                         /* Empty node for now */
>                 };
>
> +               avb: ethernet@e6800000 {

> +                       clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>;

Now we have CPG/MSTP Clock Domain support, this lacks

        power-domains = <&cpg_clocks>;

Interestingly, Ethernet seems to work for me while the ETHERAVB MSTP
clock is gated. Strange...

> +                       phy-mode = "rgmii-id";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +               };

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
--
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diff mbox

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 92c2b86a498f..a6bb2be1bbf0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -297,6 +297,47 @@ 
 			/* Empty node for now */
 		};
 
+		avb: ethernet@e6800000 {
+			compatible = "renesas,etheravb-r8a7795";
+			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "ch0", "ch1", "ch2", "ch3",
+					  "ch4", "ch5", "ch6", "ch7",
+					  "ch8", "ch9", "ch10", "ch11",
+					  "ch12", "ch13", "ch14", "ch15",
+					  "ch16", "ch17", "ch18", "ch19",
+					  "ch20", "ch21", "ch22", "ch23",
+					  "ch24";
+			clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>;
+			phy-mode = "rgmii-id";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		dmac1: dma-controller@e7300000 {
 			/* Empty node for now */
 		};