diff mbox

[3/4] ARM: dts: sun8i: Enable PWM controller on A23/A33 Q8 format tablets

Message ID 1442561739-6824-4-git-send-email-wens@csie.org (mailing list archive)
State New, archived
Headers show

Commit Message

Chen-Yu Tsai Sept. 18, 2015, 7:35 a.m. UTC
A23/A33 based Q8 format tablets use channel 0 of the PWM controller for
backlight dimming.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-q8-common.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Hans de Goede Sept. 18, 2015, 3:32 p.m. UTC | #1
Hi,

On 09/18/2015 03:35 AM, Chen-Yu Tsai wrote:
> A23/A33 based Q8 format tablets use channel 0 of the PWM controller for
> backlight dimming.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>   arch/arm/boot/dts/sun8i-q8-common.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi
> index 6f8a8bb4e9bb..4c2d0b459d6f 100644
> --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
> +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
> @@ -70,6 +70,12 @@
>   	};
>   };
>
> +&pwm {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pwm0_pins>;
> +	status = "okay";
> +};
> +
>   &r_uart {
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&r_uart_pins_a>;
>

I've a feeling this should be in sunxi-q8-common.dtsi not sun8i-q8-common.dtsi, which requires adding a pwm
node to sun5i.dtsi I'll look into this.

Regards,

Hans
Chen-Yu Tsai Sept. 18, 2015, 4:25 p.m. UTC | #2
On Fri, Sep 18, 2015 at 11:32 PM, Hans de Goede <hdegoede@redhat.com> wrote:
> Hi,
>
> On 09/18/2015 03:35 AM, Chen-Yu Tsai wrote:
>>
>> A23/A33 based Q8 format tablets use channel 0 of the PWM controller for
>> backlight dimming.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>   arch/arm/boot/dts/sun8i-q8-common.dtsi | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> b/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> index 6f8a8bb4e9bb..4c2d0b459d6f 100644
>> --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
>> @@ -70,6 +70,12 @@
>>         };
>>   };
>>
>> +&pwm {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&pwm0_pins>;
>> +       status = "okay";
>> +};
>> +
>>   &r_uart {
>>         pinctrl-names = "default";
>>         pinctrl-0 = <&r_uart_pins_a>;
>>
>
> I've a feeling this should be in sunxi-q8-common.dtsi not
> sun8i-q8-common.dtsi, which requires adding a pwm
> node to sun5i.dtsi I'll look into this.

It probably should. IIRC sun5i PWM has only one channel as opposed to
2 on A10/A20.


ChenYu
Hans de Goede Sept. 19, 2015, 9:39 p.m. UTC | #3
Hi,

On 09/18/2015 12:25 PM, Chen-Yu Tsai wrote:
> On Fri, Sep 18, 2015 at 11:32 PM, Hans de Goede <hdegoede@redhat.com> wrote:
>> Hi,
>>
>> On 09/18/2015 03:35 AM, Chen-Yu Tsai wrote:
>>>
>>> A23/A33 based Q8 format tablets use channel 0 of the PWM controller for
>>> backlight dimming.
>>>
>>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>>> ---
>>>    arch/arm/boot/dts/sun8i-q8-common.dtsi | 6 ++++++
>>>    1 file changed, 6 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi
>>> b/arch/arm/boot/dts/sun8i-q8-common.dtsi
>>> index 6f8a8bb4e9bb..4c2d0b459d6f 100644
>>> --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
>>> +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
>>> @@ -70,6 +70,12 @@
>>>          };
>>>    };
>>>
>>> +&pwm {
>>> +       pinctrl-names = "default";
>>> +       pinctrl-0 = <&pwm0_pins>;
>>> +       status = "okay";
>>> +};
>>> +
>>>    &r_uart {
>>>          pinctrl-names = "default";
>>>          pinctrl-0 = <&r_uart_pins_a>;
>>>
>>
>> I've a feeling this should be in sunxi-q8-common.dtsi not
>> sun8i-q8-common.dtsi, which requires adding a pwm
>> node to sun5i.dtsi I'll look into this.
>
> It probably should.

Which means the name of the pinctrl node should be the same
on both, hence my request to rename that. Anyways Maxime
has already merged that now, I'll workaround it and / or
do a followup patch.

> IIRC sun5i PWM has only one channel as opposed to
> 2 on A10/A20.

Nope sun5i has 2 channels, but the second channel is
only routed to the outside on A10s, not on A13.

Regards,

Hans
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi
index 6f8a8bb4e9bb..4c2d0b459d6f 100644
--- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -70,6 +70,12 @@ 
 	};
 };
 
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_pins>;
+	status = "okay";
+};
+
 &r_uart {
 	pinctrl-names = "default";
 	pinctrl-0 = <&r_uart_pins_a>;