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[v2,1/1] drm/i915: Direct all DE interrupts to host.

Message ID 1441975472-2202-1-git-send-email-sagar.a.kamble@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sagar.a.kamble@intel.com Sept. 11, 2015, 12:44 p.m. UTC
Due to flip interrupts routed to GuC, GuC stays awake always and GT does not enter RC6.
GuC firmware should re-direct to GuC those interrupts that it can handle.

v2: Commit message change and routing all interrupts to host. (Tom)

Cc: Alex Dai <yu.dai@intel.com>
Cc: Tom O'Rourke <Tom.O'Rourke@intel.com>
Cc: Akash Goel <akash.goel@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_loader.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

Comments

Tom.O'Rourke@intel.com Sept. 21, 2015, 7:02 p.m. UTC | #1
On Fri, Sep 11, 2015 at 05:44:32AM -0700, Kamble, Sagar A wrote:
> Due to flip interrupts routed to GuC, GuC stays awake always and GT does not enter RC6.
> GuC firmware should re-direct to GuC those interrupts that it can handle.
> 
> v2: Commit message change and routing all interrupts to host. (Tom)
> 
> Cc: Alex Dai <yu.dai@intel.com>
> Cc: Tom O'Rourke <Tom.O'Rourke@intel.com>
> Cc: Akash Goel <akash.goel@intel.com>
> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_guc_loader.c | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 5eafd31..0b047c4 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -110,12 +110,8 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
>  	for_each_ring(ring, dev_priv, i)
>  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>  
> -	/* tell DE to send (all) flip_done to GuC */
> -	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
> -	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
> -	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
> -	/* Unmasked bits will cause GuC response message to be sent */
> -	I915_WRITE(DE_GUCRMR, ~irqs);
> +	/* tell DE to send nothing to GuC */
> +	I915_WRITE(DE_GUCRMR, ~0);

[TOR:] Should the host driver be writing these bits in
DE_GUCRMR at all?  An alternative approach would let GuC
set/clear these bits based on whether or not GuC wants to
handle the resulting interrupts; the host driver should
not touch these bits since the host driver does not know
what GuC wants to do (or may have already done with
DE_GUCRMR register).

Thanks,
Tom


>  
>  	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
>  	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
> -- 
> 1.9.1
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 5eafd31..0b047c4 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -110,12 +110,8 @@  static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
 	for_each_ring(ring, dev_priv, i)
 		I915_WRITE(RING_MODE_GEN7(ring), irqs);
 
-	/* tell DE to send (all) flip_done to GuC */
-	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
-	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
-	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
-	/* Unmasked bits will cause GuC response message to be sent */
-	I915_WRITE(DE_GUCRMR, ~irqs);
+	/* tell DE to send nothing to GuC */
+	I915_WRITE(DE_GUCRMR, ~0);
 
 	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
 	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |