| Message ID | 1440332571-20761-3-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Gentle reminder for review. Thanks Sagar On 8/23/2015 5:52 PM, Sagar Arun Kamble wrote: > Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT CPD exit. > > Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index fff0c22..75f1c8c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4450,6 +4450,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) > { > struct drm_i915_private *dev_priv = dev->dev_private; > > + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ > + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) > + return; > + > WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); > WARN_ON(val > dev_priv->rps.max_freq); > WARN_ON(val < dev_priv->rps.min_freq); > @@ -4770,6 +4774,12 @@ static void gen9_enable_rps(struct drm_device *dev) > > gen6_init_rps_frequencies(dev); > > + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ > + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) { > + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); > + return; > + } > + > /* Program defaults and thresholds for RPS*/ > I915_WRITE(GEN6_RC_VIDEO_FREQ, > GEN9_FREQUENCY(dev_priv->rps.rp1_freq));
Hi Tom, Akash Kindly review this patch. Thanks Sagar On 9/11/2015 11:53 AM, Kamble, Sagar A wrote: > Gentle reminder for review. > > Thanks > Sagar > > On 8/23/2015 5:52 PM, Sagar Arun Kamble wrote: >> Disable Turbo on steppings prior to B0 on BXT due to hangs seen >> during GT CPD exit. >> >> Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c >> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> >> --- >> drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_pm.c >> b/drivers/gpu/drm/i915/intel_pm.c >> index fff0c22..75f1c8c 100644 >> --- a/drivers/gpu/drm/i915/intel_pm.c >> +++ b/drivers/gpu/drm/i915/intel_pm.c >> @@ -4450,6 +4450,10 @@ static void gen6_set_rps(struct drm_device >> *dev, u8 val) >> { >> struct drm_i915_private *dev_priv = dev->dev_private; >> + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ >> + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) >> + return; >> + >> WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); >> WARN_ON(val > dev_priv->rps.max_freq); >> WARN_ON(val < dev_priv->rps.min_freq); >> @@ -4770,6 +4774,12 @@ static void gen9_enable_rps(struct drm_device >> *dev) >> gen6_init_rps_frequencies(dev); >> + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ >> + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) { >> + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); >> + return; >> + } >> + >> /* Program defaults and thresholds for RPS*/ >> I915_WRITE(GEN6_RC_VIDEO_FREQ, >> GEN9_FREQUENCY(dev_priv->rps.rp1_freq)); > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Looks fine to me. Reviewed by: Alex Dai <yu.dai@intel.com>. On 08/23/2015 05:22 AM, Sagar Arun Kamble wrote: > Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT CPD exit. > > Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index fff0c22..75f1c8c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4450,6 +4450,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) > { > struct drm_i915_private *dev_priv = dev->dev_private; > > + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ > + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) > + return; > + > WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); > WARN_ON(val > dev_priv->rps.max_freq); > WARN_ON(val < dev_priv->rps.min_freq); > @@ -4770,6 +4774,12 @@ static void gen9_enable_rps(struct drm_device *dev) > > gen6_init_rps_frequencies(dev); > > + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ > + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) { > + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); > + return; > + } > + > /* Program defaults and thresholds for RPS*/ > I915_WRITE(GEN6_RC_VIDEO_FREQ, > GEN9_FREQUENCY(dev_priv->rps.rp1_freq));
On Mon, Sep 21, 2015 at 09:43:25AM -0700, Yu Dai wrote: > Looks fine to me. > Reviewed by: Alex Dai <yu.dai@intel.com>. > > On 08/23/2015 05:22 AM, Sagar Arun Kamble wrote: > >Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT CPD exit. > > > >Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c > >Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Queued for -next, thanks for the patch. -Daniel > >--- > > drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > >diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > >index fff0c22..75f1c8c 100644 > >--- a/drivers/gpu/drm/i915/intel_pm.c > >+++ b/drivers/gpu/drm/i915/intel_pm.c > >@@ -4450,6 +4450,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) > > { > > struct drm_i915_private *dev_priv = dev->dev_private; > >+ /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ > >+ if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) > >+ return; > >+ > > WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); > > WARN_ON(val > dev_priv->rps.max_freq); > > WARN_ON(val < dev_priv->rps.min_freq); > >@@ -4770,6 +4774,12 @@ static void gen9_enable_rps(struct drm_device *dev) > > gen6_init_rps_frequencies(dev); > >+ /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ > >+ if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) { > >+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); > >+ return; > >+ } > >+ > > /* Program defaults and thresholds for RPS*/ > > I915_WRITE(GEN6_RC_VIDEO_FREQ, > > GEN9_FREQUENCY(dev_priv->rps.rp1_freq)); > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index fff0c22..75f1c8c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4450,6 +4450,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) { struct drm_i915_private *dev_priv = dev->dev_private; + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) + return; + WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); WARN_ON(val > dev_priv->rps.max_freq); WARN_ON(val < dev_priv->rps.min_freq); @@ -4770,6 +4774,12 @@ static void gen9_enable_rps(struct drm_device *dev) gen6_init_rps_frequencies(dev); + /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */ + if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) { + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); + return; + } + /* Program defaults and thresholds for RPS*/ I915_WRITE(GEN6_RC_VIDEO_FREQ, GEN9_FREQUENCY(dev_priv->rps.rp1_freq));
Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT CPD exit. Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++ 1 file changed, 10 insertions(+)