| Message ID | CAG5mAdyOSDt7F5czW_9EBvo3uBCW9834-1VZsXG0mvYiB1LM8g@mail.gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
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Okay, so I switched to da830-evm-audio, and things are much better. But still not perfect. Here's the DTS: https://github.com/JetForMe/podtique/blob/master/bbb/cape/Podtique1/BB-ENABLE-PRU.dts Now I have a working MCLK, and I see clocking on BCLK and WCLK, but the rates are questionable. MCLK is 24 MHz (even though in the DTS it's set to 12 MHz); that might be okay. For the following call: # speaker-test -r 22050 -c 2 -f 1000 -F S16_LE -t sine -s 1 -D hw:0,0 WCLK is 11.88 kHz, and it is pulses (DSP mode), rather than high for left, low for right for each channel's word. BCLK is 379.5 kHz. I'm looking at the i2c commands being sent to see if I can determine what the CODEC thinks it's trying to do. > On Sep 28, 2015, at 23:42 , Caleb Crome <caleb@crome.org> wrote: > >> >> Could you send me your DTS? > > Yes, but I have modified a bit of stuff in the davinci-evm.c to make > my multi-codec setup work right. > > I turned off HDMI with this: > > commit 7f20ffd56de6921bc5f8e2fee8da75d743d57847 > Author: Caleb Crome <caleb@signalessence.com> > Date: Wed Sep 9 13:33:36 2015 -0700 > > turn off hdmi from boneblack > > diff --git a/arch/arm/boot/dts/am335x-boneblack.dts > b/arch/arm/boot/dts/am335x-boneblack.dts > index 5c42d25..6335072 100644 > --- a/arch/arm/boot/dts/am335x-boneblack.dts > +++ b/arch/arm/boot/dts/am335x-boneblack.dts > @@ -34,51 +34,9 @@ > }; > > &am33xx_pinmux { > - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { > - pinctrl-single,pins = < > - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ > - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ > - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ > - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ > - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ > - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | > AM33XX_PIN_OUTPUT */ > - >; > - }; > - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { > - pinctrl-single,pins = < > - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ > - >; > - }; > -}; > - > -&lcdc { > - status = "okay"; > }; > > / { > - hdmi { > - compatible = "ti,tilcdc,slave"; > - i2c = <&i2c0>; > - pinctrl-names = "default", "off"; > - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; > - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; > - status = "okay"; > - }; > }; > > &rtc { > > > > And here's the added bit: > > Index: KERNEL/arch/arm/boot/dts/am335x-boneblack.dts > =================================================================== > --- KERNEL.orig/arch/arm/boot/dts/am335x-boneblack.dts 2015-09-21 > 17:23:14.961343604 -0700 > +++ KERNEL/arch/arm/boot/dts/am335x-boneblack.dts 2015-09-22 > 09:35:49.308278239 -0700 > @@ -5,11 +5,25 @@ > * it under the terms of the GNU General Public License version 2 as > * published by the Free Software Foundation. > */ > + > + > + > +/* > + * MCASP pin mapping > + * ball BBB > + * MCASP0_ACLKX A13 P9.31 > + * MCASP0_AFSX B13 P9.29 > + * MCASP0_AXR2 (mcasp OUT) C12 P9.28 > + * MCASP0_AXR3 (mcasp IN) A14 P9.25 > +*/ > + > /dts-v1/; > > #include "am33xx.dtsi" > #include "am335x-bone-common.dtsi" > > + > + > / { > model = "TI AM335x BeagleBone Black"; > compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; > @@ -34,9 +48,119 @@ > }; > > &am33xx_pinmux { > + i2c2_pins_default: i2c2_pins_default { > + pinctrl-single,pins = < > + 0x17c ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D17) > uart1_rtsn.I2C2_SCL */ > + 0x178 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D18) > uart1_ctsn.I2C2_SDA */ > + >; > + }; > + > + > + i2c1_pins_default: pinmux_i2c1_pins { > + pinctrl-single,pins = < > + 0x158 0x72 /* > uart1_ctsn.i2c2_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */ > + 0x15c 0x72 /* > uart1_rtsn.i2c2_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */ > + >; > + }; > + > + mcasp_0_pins_default: mcasp_0_pins_default { > + pinctrl-single,pins = < > + 0x190 ( PIN_INPUT | MUX_MODE0 ) /* (A13) mcasp0_aclkx.mcasp0_aclkx */ > + 0x194 ( PIN_INPUT | MUX_MODE0 ) /* (B13) mcasp0_fsx.mcasp0_fsx */ > + 0x19c ( PIN_OUTPUT | MUX_MODE2 ) /* (C12) mcasp0_ahclkr.mcasp0_axr2 */ > + 0x1ac ( PIN_INPUT | MUX_MODE2 ) /* (A14) mcasp0_ahclkx.mcasp0_axr3 */ > + >; > + }; > +}; > + > + > +&i2c1 { > + clock-frequency = <100000>; > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c1_pins_default>; > + status="okay"; > + > + tlv320aic3x_a: tlv320aic3x@18 { > + compatible = "ti,tlv320aic3x"; > + reg = <0x18>; > + tdm-offset = <0>; > + status = "okay"; > + }; > + > + tlv320aic3x_b: tlv320aic3x@19 { > + compatible = "ti,tlv320aic3x"; > + reg = <0x19>; > + tdm-offset = <32>; > + status = "okay"; > + }; > + > + tlv320aic3x_c: tlv320aic3x@1a { > + compatible = "ti,tlv320aic3x"; > + reg = <0x1a>; > + tdm-offset = <64>; > + status = "okay"; > + }; > + > + tlv320aic3x_d: tlv320aic3x@1b { > + compatible = "ti,tlv320aic3x"; > + reg = <0x1b>; > + tdm-offset = <96>; > + status = "okay"; > + }; > + > }; > > +&mcasp0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&mcasp_0_pins_default>; > + status = "okay"; > + > + op-mode = <0>; /* MCASP_IIS_MODE */ > + tdm-slots = <16>; > + num-serializer = <16>; > + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ > + 0 0 1 2 > + 0 0 0 0 > + 0 0 0 0 > + 0 0 0 0 > + >; > + tx-num-evt = <1>; > + rx-num-evt = <1>; > +}; > + > + > / { > + sound { > + compatible = "ti,da830-evm-audio"; > + ti,model = "PUPPY-AUDIO"; > + ti,audio-codec = < > + &tlv320aic3x_a > + &tlv320aic3x_b > + &tlv320aic3x_c > + &tlv320aic3x_d > + >; > + ti,mcasp-controller = <&mcasp0>; > + ti,codec-clock-rate = <12288000>; > + ti,audio-routing = > + "Headphone Jack", "a HPLOUT", > + "Headphone Jack", "a HPROUT", > + "Headphone Jack", "b HPLOUT", > + "Headphone Jack", "b HPROUT", > + "Headphone Jack", "c HPLOUT", > + "Headphone Jack", "c HPROUT", > + "Headphone Jack", "d HPLOUT", > + "Headphone Jack", "d HPROUT", > + "a LINE1L", "Line In", > + "a LINE1R", "Line In", > + "b LINE1L", "Line In", > + "b LINE1R", "Line In", > + "c LINE1L", "Line In", > + "c LINE1R", "Line In", > + "d LINE1L", "Line In", > + "d LINE1R", "Line In"; > + status="okay"; > + }; > }; > > &rtc { > _______________________________________________ > Alsa-devel mailing list > Alsa-devel@alsa-project.org > http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
You need to fix the mclk rate first I think, then the pll settings should fall in line. The DTS you sent still has the simple-audio-card and not the da830 stuff in it. Caleb Sent from my iPhone > On Sep 29, 2015, at 1:28 AM, Rick Mann <rmann@latencyzero.com> wrote: > > Okay, so I switched to da830-evm-audio, and things are much better. But still not perfect. Here's the DTS: > > https://github.com/JetForMe/podtique/blob/master/bbb/cape/Podtique1/BB-ENABLE-PRU.dts > > Now I have a working MCLK, and I see clocking on BCLK and WCLK, but the rates are questionable. MCLK is 24 MHz (even though in the DTS it's set to 12 MHz); that might be okay. For the following call: > > # speaker-test -r 22050 -c 2 -f 1000 -F S16_LE -t sine -s 1 -D hw:0,0 > > WCLK is 11.88 kHz, and it is pulses (DSP mode), rather than high for left, low for right for each channel's word. BCLK is 379.5 kHz. > > I'm looking at the i2c commands being sent to see if I can determine what the CODEC thinks it's trying to do. > >>> On Sep 28, 2015, at 23:42 , Caleb Crome <caleb@crome.org> wrote: >>> >>> >>> Could you send me your DTS? >> >> Yes, but I have modified a bit of stuff in the davinci-evm.c to make >> my multi-codec setup work right. >> >> I turned off HDMI with this: >> >> commit 7f20ffd56de6921bc5f8e2fee8da75d743d57847 >> Author: Caleb Crome <caleb@signalessence.com> >> Date: Wed Sep 9 13:33:36 2015 -0700 >> >> turn off hdmi from boneblack >> >> diff --git a/arch/arm/boot/dts/am335x-boneblack.dts >> b/arch/arm/boot/dts/am335x-boneblack.dts >> index 5c42d25..6335072 100644 >> --- a/arch/arm/boot/dts/am335x-boneblack.dts >> +++ b/arch/arm/boot/dts/am335x-boneblack.dts >> @@ -34,51 +34,9 @@ >> }; >> >> &am33xx_pinmux { >> - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { >> - pinctrl-single,pins = < >> - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ >> - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >> - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >> - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >> - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >> - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | >> AM33XX_PIN_OUTPUT */ >> - >; >> - }; >> - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { >> - pinctrl-single,pins = < >> - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ >> - >; >> - }; >> -}; >> - >> -&lcdc { >> - status = "okay"; >> }; >> >> / { >> - hdmi { >> - compatible = "ti,tilcdc,slave"; >> - i2c = <&i2c0>; >> - pinctrl-names = "default", "off"; >> - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; >> - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; >> - status = "okay"; >> - }; >> }; >> >> &rtc { >> >> >> >> And here's the added bit: >> >> Index: KERNEL/arch/arm/boot/dts/am335x-boneblack.dts >> =================================================================== >> --- KERNEL.orig/arch/arm/boot/dts/am335x-boneblack.dts 2015-09-21 >> 17:23:14.961343604 -0700 >> +++ KERNEL/arch/arm/boot/dts/am335x-boneblack.dts 2015-09-22 >> 09:35:49.308278239 -0700 >> @@ -5,11 +5,25 @@ >> * it under the terms of the GNU General Public License version 2 as >> * published by the Free Software Foundation. >> */ >> + >> + >> + >> +/* >> + * MCASP pin mapping >> + * ball BBB >> + * MCASP0_ACLKX A13 P9.31 >> + * MCASP0_AFSX B13 P9.29 >> + * MCASP0_AXR2 (mcasp OUT) C12 P9.28 >> + * MCASP0_AXR3 (mcasp IN) A14 P9.25 >> +*/ >> + >> /dts-v1/; >> >> #include "am33xx.dtsi" >> #include "am335x-bone-common.dtsi" >> >> + >> + >> / { >> model = "TI AM335x BeagleBone Black"; >> compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; >> @@ -34,9 +48,119 @@ >> }; >> >> &am33xx_pinmux { >> + i2c2_pins_default: i2c2_pins_default { >> + pinctrl-single,pins = < >> + 0x17c ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D17) >> uart1_rtsn.I2C2_SCL */ >> + 0x178 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D18) >> uart1_ctsn.I2C2_SDA */ >> + >; >> + }; >> + >> + >> + i2c1_pins_default: pinmux_i2c1_pins { >> + pinctrl-single,pins = < >> + 0x158 0x72 /* >> uart1_ctsn.i2c2_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */ >> + 0x15c 0x72 /* >> uart1_rtsn.i2c2_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */ >> + >; >> + }; >> + >> + mcasp_0_pins_default: mcasp_0_pins_default { >> + pinctrl-single,pins = < >> + 0x190 ( PIN_INPUT | MUX_MODE0 ) /* (A13) mcasp0_aclkx.mcasp0_aclkx */ >> + 0x194 ( PIN_INPUT | MUX_MODE0 ) /* (B13) mcasp0_fsx.mcasp0_fsx */ >> + 0x19c ( PIN_OUTPUT | MUX_MODE2 ) /* (C12) mcasp0_ahclkr.mcasp0_axr2 */ >> + 0x1ac ( PIN_INPUT | MUX_MODE2 ) /* (A14) mcasp0_ahclkx.mcasp0_axr3 */ >> + >; >> + }; >> +}; >> + >> + >> +&i2c1 { >> + clock-frequency = <100000>; >> + status = "okay"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&i2c1_pins_default>; >> + status="okay"; >> + >> + tlv320aic3x_a: tlv320aic3x@18 { >> + compatible = "ti,tlv320aic3x"; >> + reg = <0x18>; >> + tdm-offset = <0>; >> + status = "okay"; >> + }; >> + >> + tlv320aic3x_b: tlv320aic3x@19 { >> + compatible = "ti,tlv320aic3x"; >> + reg = <0x19>; >> + tdm-offset = <32>; >> + status = "okay"; >> + }; >> + >> + tlv320aic3x_c: tlv320aic3x@1a { >> + compatible = "ti,tlv320aic3x"; >> + reg = <0x1a>; >> + tdm-offset = <64>; >> + status = "okay"; >> + }; >> + >> + tlv320aic3x_d: tlv320aic3x@1b { >> + compatible = "ti,tlv320aic3x"; >> + reg = <0x1b>; >> + tdm-offset = <96>; >> + status = "okay"; >> + }; >> + >> }; >> >> +&mcasp0 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&mcasp_0_pins_default>; >> + status = "okay"; >> + >> + op-mode = <0>; /* MCASP_IIS_MODE */ >> + tdm-slots = <16>; >> + num-serializer = <16>; >> + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ >> + 0 0 1 2 >> + 0 0 0 0 >> + 0 0 0 0 >> + 0 0 0 0 >> + >; >> + tx-num-evt = <1>; >> + rx-num-evt = <1>; >> +}; >> + >> + >> / { >> + sound { >> + compatible = "ti,da830-evm-audio"; >> + ti,model = "PUPPY-AUDIO"; >> + ti,audio-codec = < >> + &tlv320aic3x_a >> + &tlv320aic3x_b >> + &tlv320aic3x_c >> + &tlv320aic3x_d >> + >; >> + ti,mcasp-controller = <&mcasp0>; >> + ti,codec-clock-rate = <12288000>; >> + ti,audio-routing = >> + "Headphone Jack", "a HPLOUT", >> + "Headphone Jack", "a HPROUT", >> + "Headphone Jack", "b HPLOUT", >> + "Headphone Jack", "b HPROUT", >> + "Headphone Jack", "c HPLOUT", >> + "Headphone Jack", "c HPROUT", >> + "Headphone Jack", "d HPLOUT", >> + "Headphone Jack", "d HPROUT", >> + "a LINE1L", "Line In", >> + "a LINE1R", "Line In", >> + "b LINE1L", "Line In", >> + "b LINE1R", "Line In", >> + "c LINE1L", "Line In", >> + "c LINE1R", "Line In", >> + "d LINE1L", "Line In", >> + "d LINE1R", "Line In"; >> + status="okay"; >> + }; >> }; >> >> &rtc { >> _______________________________________________ >> Alsa-devel mailing list >> Alsa-devel@alsa-project.org >> http://mailman.alsa-project.org/mailman/listinfo/alsa-devel > > > -- > Rick Mann > rmann@latencyzero.com > >
Ugh, sorry. Here you go: https://github.com/JetForMe/podtique/blob/v1/bbb/cape/Podtique1/BB-ENABLE-PRU.dts Sent from my iPhone > On Sep 29, 2015, at 07:08, Caleb Crome <caleb@crome.org> wrote: > > You need to fix the mclk rate first I think, then the pll settings should fall in line. The DTS you sent still has the simple-audio-card and not the da830 stuff in it. > > Caleb > > Sent from my iPhone > >> On Sep 29, 2015, at 1:28 AM, Rick Mann <rmann@latencyzero.com> wrote: >> >> Okay, so I switched to da830-evm-audio, and things are much better. But still not perfect. Here's the DTS: >> >> https://github.com/JetForMe/podtique/blob/master/bbb/cape/Podtique1/BB-ENABLE-PRU.dts >> >> Now I have a working MCLK, and I see clocking on BCLK and WCLK, but the rates are questionable. MCLK is 24 MHz (even though in the DTS it's set to 12 MHz); that might be okay. For the following call: >> >> # speaker-test -r 22050 -c 2 -f 1000 -F S16_LE -t sine -s 1 -D hw:0,0 >> >> WCLK is 11.88 kHz, and it is pulses (DSP mode), rather than high for left, low for right for each channel's word. BCLK is 379.5 kHz. >> >> I'm looking at the i2c commands being sent to see if I can determine what the CODEC thinks it's trying to do. >> >>>> On Sep 28, 2015, at 23:42 , Caleb Crome <caleb@crome.org> wrote: >>>> >>>> >>>> Could you send me your DTS? >>> >>> Yes, but I have modified a bit of stuff in the davinci-evm.c to make >>> my multi-codec setup work right. >>> >>> I turned off HDMI with this: >>> >>> commit 7f20ffd56de6921bc5f8e2fee8da75d743d57847 >>> Author: Caleb Crome <caleb@signalessence.com> >>> Date: Wed Sep 9 13:33:36 2015 -0700 >>> >>> turn off hdmi from boneblack >>> >>> diff --git a/arch/arm/boot/dts/am335x-boneblack.dts >>> b/arch/arm/boot/dts/am335x-boneblack.dts >>> index 5c42d25..6335072 100644 >>> --- a/arch/arm/boot/dts/am335x-boneblack.dts >>> +++ b/arch/arm/boot/dts/am335x-boneblack.dts >>> @@ -34,51 +34,9 @@ >>> }; >>> >>> &am33xx_pinmux { >>> - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { >>> - pinctrl-single,pins = < >>> - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ >>> - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ >>> - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >>> - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >>> - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >>> - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | >>> AM33XX_PIN_OUTPUT */ >>> - >; >>> - }; >>> - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { >>> - pinctrl-single,pins = < >>> - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ >>> - >; >>> - }; >>> -}; >>> - >>> -&lcdc { >>> - status = "okay"; >>> }; >>> >>> / { >>> - hdmi { >>> - compatible = "ti,tilcdc,slave"; >>> - i2c = <&i2c0>; >>> - pinctrl-names = "default", "off"; >>> - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; >>> - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; >>> - status = "okay"; >>> - }; >>> }; >>> >>> &rtc { >>> >>> >>> >>> And here's the added bit: >>> >>> Index: KERNEL/arch/arm/boot/dts/am335x-boneblack.dts >>> =================================================================== >>> --- KERNEL.orig/arch/arm/boot/dts/am335x-boneblack.dts 2015-09-21 >>> 17:23:14.961343604 -0700 >>> +++ KERNEL/arch/arm/boot/dts/am335x-boneblack.dts 2015-09-22 >>> 09:35:49.308278239 -0700 >>> @@ -5,11 +5,25 @@ >>> * it under the terms of the GNU General Public License version 2 as >>> * published by the Free Software Foundation. >>> */ >>> + >>> + >>> + >>> +/* >>> + * MCASP pin mapping >>> + * ball BBB >>> + * MCASP0_ACLKX A13 P9.31 >>> + * MCASP0_AFSX B13 P9.29 >>> + * MCASP0_AXR2 (mcasp OUT) C12 P9.28 >>> + * MCASP0_AXR3 (mcasp IN) A14 P9.25 >>> +*/ >>> + >>> /dts-v1/; >>> >>> #include "am33xx.dtsi" >>> #include "am335x-bone-common.dtsi" >>> >>> + >>> + >>> / { >>> model = "TI AM335x BeagleBone Black"; >>> compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; >>> @@ -34,9 +48,119 @@ >>> }; >>> >>> &am33xx_pinmux { >>> + i2c2_pins_default: i2c2_pins_default { >>> + pinctrl-single,pins = < >>> + 0x17c ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D17) >>> uart1_rtsn.I2C2_SCL */ >>> + 0x178 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D18) >>> uart1_ctsn.I2C2_SDA */ >>> + >; >>> + }; >>> + >>> + >>> + i2c1_pins_default: pinmux_i2c1_pins { >>> + pinctrl-single,pins = < >>> + 0x158 0x72 /* >>> uart1_ctsn.i2c2_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */ >>> + 0x15c 0x72 /* >>> uart1_rtsn.i2c2_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */ >>> + >; >>> + }; >>> + >>> + mcasp_0_pins_default: mcasp_0_pins_default { >>> + pinctrl-single,pins = < >>> + 0x190 ( PIN_INPUT | MUX_MODE0 ) /* (A13) mcasp0_aclkx.mcasp0_aclkx */ >>> + 0x194 ( PIN_INPUT | MUX_MODE0 ) /* (B13) mcasp0_fsx.mcasp0_fsx */ >>> + 0x19c ( PIN_OUTPUT | MUX_MODE2 ) /* (C12) mcasp0_ahclkr.mcasp0_axr2 */ >>> + 0x1ac ( PIN_INPUT | MUX_MODE2 ) /* (A14) mcasp0_ahclkx.mcasp0_axr3 */ >>> + >; >>> + }; >>> +}; >>> + >>> + >>> +&i2c1 { >>> + clock-frequency = <100000>; >>> + status = "okay"; >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&i2c1_pins_default>; >>> + status="okay"; >>> + >>> + tlv320aic3x_a: tlv320aic3x@18 { >>> + compatible = "ti,tlv320aic3x"; >>> + reg = <0x18>; >>> + tdm-offset = <0>; >>> + status = "okay"; >>> + }; >>> + >>> + tlv320aic3x_b: tlv320aic3x@19 { >>> + compatible = "ti,tlv320aic3x"; >>> + reg = <0x19>; >>> + tdm-offset = <32>; >>> + status = "okay"; >>> + }; >>> + >>> + tlv320aic3x_c: tlv320aic3x@1a { >>> + compatible = "ti,tlv320aic3x"; >>> + reg = <0x1a>; >>> + tdm-offset = <64>; >>> + status = "okay"; >>> + }; >>> + >>> + tlv320aic3x_d: tlv320aic3x@1b { >>> + compatible = "ti,tlv320aic3x"; >>> + reg = <0x1b>; >>> + tdm-offset = <96>; >>> + status = "okay"; >>> + }; >>> + >>> }; >>> >>> +&mcasp0 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&mcasp_0_pins_default>; >>> + status = "okay"; >>> + >>> + op-mode = <0>; /* MCASP_IIS_MODE */ >>> + tdm-slots = <16>; >>> + num-serializer = <16>; >>> + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ >>> + 0 0 1 2 >>> + 0 0 0 0 >>> + 0 0 0 0 >>> + 0 0 0 0 >>> + >; >>> + tx-num-evt = <1>; >>> + rx-num-evt = <1>; >>> +}; >>> + >>> + >>> / { >>> + sound { >>> + compatible = "ti,da830-evm-audio"; >>> + ti,model = "PUPPY-AUDIO"; >>> + ti,audio-codec = < >>> + &tlv320aic3x_a >>> + &tlv320aic3x_b >>> + &tlv320aic3x_c >>> + &tlv320aic3x_d >>> + >; >>> + ti,mcasp-controller = <&mcasp0>; >>> + ti,codec-clock-rate = <12288000>; >>> + ti,audio-routing = >>> + "Headphone Jack", "a HPLOUT", >>> + "Headphone Jack", "a HPROUT", >>> + "Headphone Jack", "b HPLOUT", >>> + "Headphone Jack", "b HPROUT", >>> + "Headphone Jack", "c HPLOUT", >>> + "Headphone Jack", "c HPROUT", >>> + "Headphone Jack", "d HPLOUT", >>> + "Headphone Jack", "d HPROUT", >>> + "a LINE1L", "Line In", >>> + "a LINE1R", "Line In", >>> + "b LINE1L", "Line In", >>> + "b LINE1R", "Line In", >>> + "c LINE1L", "Line In", >>> + "c LINE1R", "Line In", >>> + "d LINE1L", "Line In", >>> + "d LINE1R", "Line In"; >>> + status="okay"; >>> + }; >>> }; >>> >>> &rtc { >>> _______________________________________________ >>> Alsa-devel mailing list >>> Alsa-devel@alsa-project.org >>> http://mailman.alsa-project.org/mailman/listinfo/alsa-devel >> >> >> -- >> Rick Mann >> rmann@latencyzero.com >> >>
On Tue, Sep 29, 2015 at 11:41 AM, Rick Mann <rmann@latencyzero.com> wrote: > Ugh, sorry. Here you go: > > https://github.com/JetForMe/podtique/blob/v1/bbb/cape/Podtique1/BB-ENABLE-PRU.dts > > Sent from my iPhone > > On Sep 29, 2015, at 07:08, Caleb Crome <caleb@crome.org> wrote: > > Now I have a working MCLK, and I see clocking on BCLK and WCLK, but the > rates are questionable. MCLK is 24 MHz (even though in the DTS it's set to > 12 MHz); that might be okay. It's definitely not obvious why you'd be getting 24MHz instead of 12. Wait. Are you getting exactly 24 MHz, or about 24 MHz? in davinci-evm.c there are some .sysclk settings set to 24576000 as in the da830_snd_soc_card_crvdata. > > > # speaker-test -r 22050 -c 2 -f 1000 -F S16_LE -t sine -s 1 -D hw:0,0 > > > WCLK is 11.88 kHz, and it is pulses (DSP mode), rather than high for left, > low for right for each channel's word. BCLK is 379.5 kHz. Sounds like you're not in I2S mode, you must be in DSP or left-justified mode. That's set in your eavinci-evm.c in the snd_soc_dai_link structure under the field .dai_fmt. Most of them are set to SND_SOC_DAIFMT_DSP_B. -Caleb
> On Oct 1, 2015, at 08:38 , Caleb Crome <caleb@crome.org> wrote: > > On Tue, Sep 29, 2015 at 11:41 AM, Rick Mann <rmann@latencyzero.com> wrote: >> Ugh, sorry. Here you go: >> >> https://github.com/JetForMe/podtique/blob/v1/bbb/cape/Podtique1/BB-ENABLE-PRU.dts >> >> Sent from my iPhone >> >> On Sep 29, 2015, at 07:08, Caleb Crome <caleb@crome.org> wrote: >> >> Now I have a working MCLK, and I see clocking on BCLK and WCLK, but the >> rates are questionable. MCLK is 24 MHz (even though in the DTS it's set to >> 12 MHz); that might be okay. > > It's definitely not obvious why you'd be getting 24MHz instead of 12. > Wait. Are you getting exactly 24 MHz, or about 24 MHz? in > davinci-evm.c there are some .sysclk settings set to 24576000 as in > the da830_snd_soc_card_crvdata. It's pretty exactly 24.00 MHz, ±0.02 MHz. I noticed I get these errors (this is 4.1.4-ti-r9 from the Beaglebone Black Debian "console" distro. For reference, here's my overlay: https://github.com/JetForMe/podtique/blob/v1/bbb/cape/Podtique1/BB-ENABLE-PRU.dts). Since I set the clock rate in the sound node, and snd_soc_register_card() is failing (-517 is EPROBE_DEFER, "Driver requests probe retry"), I wonder if the DTS-speified clock rate isn't getting passed through to the tlv320aic. ... [ 133.516593] davinci_evm sound: ASoC: CPU DAI (null) not registered [ 133.522815] davinci_evm sound: snd_soc_register_card failed (-517) ... [ 133.607805] davinci_evm sound: ASoC: DAPM unknown pin MONO_LOUT Now, I don't specify MONO_LOUT anywhere in my DTS, but it is in tlv320aic3x.c and davinci-evm.c. Here's the complete dmesg upon loading the device tree: [ 133.424928] bone_capemgr bone_capemgr: part_number 'BB-ENABLE-PRU', version 'N/A' [ 133.424975] bone_capemgr bone_capemgr: slot #4: override [ 133.424993] bone_capemgr bone_capemgr: Using override eeprom data at slot 4 [ 133.425011] bone_capemgr bone_capemgr: slot #4: 'Override Board Name,00A0,Override Manuf,BB-ENABLE-PRU' [ 133.425143] bone_capemgr:capemgr_load_slot:1148: bone_capemgr bone_capemgr: slot #4: Requesting part number/version based 'BB-ENABLE-PRU-00A0.dtbo [ 133.425164] bone_capemgr:capemgr_load_slot:1162: bone_capemgr bone_capemgr: slot #4: Requesting firmware 'BB-ENABLE-PRU-00A0.dtbo' for board-name 'Override Board Name', version '00A0' [ 133.426741] bone_capemgr:capemgr_load_slot:1171: bone_capemgr bone_capemgr: slot #4: dtbo 'BB-ENABLE-PRU-00A0.dtbo' loaded; converting to live tree [ 133.440820] gpio-of-helper ocp:gpio_helper: ready [ 133.448385] pruss_uio 4a300000.pruss: pins are not configured from the driver [ 133.460959] bone_capemgr bone_capemgr: slot #4: dtbo 'BB-ENABLE-PRU-00A0.dtbo' loaded; overlay id #0 [ 133.516558] snd_soc_core:soc_bind_dai_link:938: davinci_evm sound: ASoC: binding TLV320AIC3X at idx 0 [ 133.516593] davinci_evm sound: ASoC: CPU DAI (null) not registered [ 133.522815] davinci_evm sound: snd_soc_register_card failed (-517) [ 133.533356] snd_soc_core:snd_soc_register_codec:3064: tlv320aic3x-codec 2-0018: codec register 2-0018 [ 133.533406] snd_soc_core:snd_soc_register_dais:2590: tlv320aic3x-codec 2-0018: ASoC: dai register 2-0018 #1 [ 133.533424] snd_soc_core:snd_soc_register_dais:2634: tlv320aic3x-codec 2-0018: ASoC: Registered DAI 'tlv320aic3x-hifi' [ 133.533442] snd_soc_core:snd_soc_register_codec:3138: tlv320aic3x-codec 2-0018: ASoC: Registered codec 'tlv320aic3x-codec.2-0018' [ 133.546622] base:of_property_match_string:1398: comparing tx with tx [ 133.546675] base:of_property_match_string:1398: comparing rx with tx [ 133.546686] base:of_property_match_string:1398: comparing rx with rx [ 133.546739] base:of_property_match_string:1398: comparing common with tx [ 133.546751] base:of_property_match_string:1398: comparing common with rx [ 133.546763] base:of_property_match_string:1398: comparing rx with tx [ 133.546773] base:of_property_match_string:1398: comparing rx with rx [ 133.550537] base:of_property_match_string:1398: comparing tx with tx [ 133.556638] snd_soc_core:snd_soc_register_dais:2590: davinci-mcasp 48038000.mcasp: ASoC: dai register 48038000.mcasp #1 [ 133.556671] snd_soc_core:snd_soc_register_dais:2634: davinci-mcasp 48038000.mcasp: ASoC: Registered DAI '48038000.mcasp' [ 133.556830] snd_soc_core:snd_soc_add_platform:2892: davinci-mcasp 48038000.mcasp: ASoC: Registered platform '48038000.mcasp' [ 133.606784] snd_soc_core:soc_bind_dai_link:938: davinci_evm sound: ASoC: binding TLV320AIC3X at idx 0 [ 133.607118] snd_soc_core:snd_soc_dapm_new_dai_widgets:3494: tlv320aic3x-codec 2-0018: ASoC: adding Playback widget [ 133.607139] snd_soc_core:snd_soc_dapm_new_dai_widgets:3513: tlv320aic3x-codec 2-0018: ASoC: adding Capture widget [ 133.607704] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late -2 [ 133.607724] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late -1 [ 133.607738] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late 0 [ 133.607752] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late 1 [ 133.607766] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late 2 [ 133.607805] davinci_evm sound: ASoC: DAPM unknown pin MONO_LOUT [ 133.627880] snd_soc_core:soc_new_pcm:2510: davinci_evm sound: ASoC: registered pcm #0 AIC3X tlv320aic3x-hifi-0 [ 133.631201] davinci_evm sound: tlv320aic3x-hifi <-> 48038000.mcasp mapping ok [ 133.631252] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Right ADC -> Capture [ 133.631273] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Left ADC -> Capture [ 133.631294] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Playback -> Right DAC [ 133.631308] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Playback -> Left DAC > >> >> >> # speaker-test -r 22050 -c 2 -f 1000 -F S16_LE -t sine -s 1 -D hw:0,0 >> >> >> WCLK is 11.88 kHz, and it is pulses (DSP mode), rather than high for left, >> low for right for each channel's word. BCLK is 379.5 kHz. > > Sounds like you're not in I2S mode, you must be in DSP or > left-justified mode. That's set in your eavinci-evm.c in the > snd_soc_dai_link structure under the field .dai_fmt. Most of them are > set to SND_SOC_DAIFMT_DSP_B. Interesting you mention that. It in fact does set it to DSP mode. Someone else on the list said for stereo, DSP and I2S modes were the same, and I didn't challenge him on that. I don't know how the code that reads the mcasp0 overlay (and thus reads the op-mode=0 part) communicates with the tlv320aic3x.c code to set the correct i2c register, but seems to not be doing that correctly. I think it's time I built that tree myself and dropped in some printk() statements. :-/
Sent from my iPhone > On Oct 2, 2015, at 2:55 AM, Rick Mann <rmann@latencyzero.com> wrote: > > >> On Oct 1, 2015, at 08:38 , Caleb Crome <caleb@crome.org> wrote: >> >> On Tue, Sep 29, 2015 at 11:41 AM, Rick Mann <rmann@latencyzero.com> wrote: >>> Ugh, sorry. Here you go: >>> >>> https://github.com/JetForMe/podtique/blob/v1/bbb/cape/Podtique1/BB-ENABLE-PRU.dts >>> >>> Sent from my iPhone >>> >>> On Sep 29, 2015, at 07:08, Caleb Crome <caleb@crome.org> wrote: >>> >>> Now I have a working MCLK, and I see clocking on BCLK and WCLK, but the >>> rates are questionable. MCLK is 24 MHz (even though in the DTS it's set to >>> 12 MHz); that might be okay. >> >> It's definitely not obvious why you'd be getting 24MHz instead of 12. >> Wait. Are you getting exactly 24 MHz, or about 24 MHz? in >> davinci-evm.c there are some .sysclk settings set to 24576000 as in >> the da830_snd_soc_card_crvdata. > > It's pretty exactly 24.00 MHz, ±0.02 MHz. > Oh, it's coming back to me. Perhaps 24 MHz is all the pin can put out. So if you set your sysclk to 24 MHz, then the PLL will get set to the right thing, and give you the right clocks. My board has its own clock, so I don't actually use the mclk from the bbb. Also, you can use DSP mode for stereo just fine. I don't think you need to worry about that at all as long as both sides recognize the format. > I noticed I get these errors (this is 4.1.4-ti-r9 from the Beaglebone Black Debian "console" distro. For reference, here's my overlay: https://github.com/JetForMe/podtique/blob/v1/bbb/cape/Podtique1/BB-ENABLE-PRU.dts). Since I set the clock rate in the sound node, and snd_soc_register_card() is failing (-517 is EPROBE_DEFER, "Driver requests probe retry"), I wonder if the DTS-speified clock rate isn't getting passed through to the tlv320aic. If not mistaken , that happens because the pin module isn't loaded yet. I think you can ignore this. > > ... > [ 133.516593] davinci_evm sound: ASoC: CPU DAI (null) not registered > [ 133.522815] davinci_evm sound: snd_soc_register_card failed (-517) > ... > [ 133.607805] davinci_evm sound: ASoC: DAPM unknown pin MONO_LOUT > > Now, I don't specify MONO_LOUT anywhere in my DTS, but it is in tlv320aic3x.c and davinci-evm.c. > > Here's the complete dmesg upon loading the device tree: > > [ 133.424928] bone_capemgr bone_capemgr: part_number 'BB-ENABLE-PRU', version 'N/A' > [ 133.424975] bone_capemgr bone_capemgr: slot #4: override > [ 133.424993] bone_capemgr bone_capemgr: Using override eeprom data at slot 4 > [ 133.425011] bone_capemgr bone_capemgr: slot #4: 'Override Board Name,00A0,Override Manuf,BB-ENABLE-PRU' > [ 133.425143] bone_capemgr:capemgr_load_slot:1148: bone_capemgr bone_capemgr: slot #4: Requesting part number/version based 'BB-ENABLE-PRU-00A0.dtbo > [ 133.425164] bone_capemgr:capemgr_load_slot:1162: bone_capemgr bone_capemgr: slot #4: Requesting firmware 'BB-ENABLE-PRU-00A0.dtbo' for board-name 'Override Board Name', version '00A0' > [ 133.426741] bone_capemgr:capemgr_load_slot:1171: bone_capemgr bone_capemgr: slot #4: dtbo 'BB-ENABLE-PRU-00A0.dtbo' loaded; converting to live tree > [ 133.440820] gpio-of-helper ocp:gpio_helper: ready > [ 133.448385] pruss_uio 4a300000.pruss: pins are not configured from the driver > [ 133.460959] bone_capemgr bone_capemgr: slot #4: dtbo 'BB-ENABLE-PRU-00A0.dtbo' loaded; overlay id #0 > [ 133.516558] snd_soc_core:soc_bind_dai_link:938: davinci_evm sound: ASoC: binding TLV320AIC3X at idx 0 > [ 133.516593] davinci_evm sound: ASoC: CPU DAI (null) not registered > [ 133.522815] davinci_evm sound: snd_soc_register_card failed (-517) > [ 133.533356] snd_soc_core:snd_soc_register_codec:3064: tlv320aic3x-codec 2-0018: codec register 2-0018 > [ 133.533406] snd_soc_core:snd_soc_register_dais:2590: tlv320aic3x-codec 2-0018: ASoC: dai register 2-0018 #1 > [ 133.533424] snd_soc_core:snd_soc_register_dais:2634: tlv320aic3x-codec 2-0018: ASoC: Registered DAI 'tlv320aic3x-hifi' > [ 133.533442] snd_soc_core:snd_soc_register_codec:3138: tlv320aic3x-codec 2-0018: ASoC: Registered codec 'tlv320aic3x-codec.2-0018' > [ 133.546622] base:of_property_match_string:1398: comparing tx with tx > [ 133.546675] base:of_property_match_string:1398: comparing rx with tx > [ 133.546686] base:of_property_match_string:1398: comparing rx with rx > [ 133.546739] base:of_property_match_string:1398: comparing common with tx > [ 133.546751] base:of_property_match_string:1398: comparing common with rx > [ 133.546763] base:of_property_match_string:1398: comparing rx with tx > [ 133.546773] base:of_property_match_string:1398: comparing rx with rx > [ 133.550537] base:of_property_match_string:1398: comparing tx with tx > [ 133.556638] snd_soc_core:snd_soc_register_dais:2590: davinci-mcasp 48038000.mcasp: ASoC: dai register 48038000.mcasp #1 > [ 133.556671] snd_soc_core:snd_soc_register_dais:2634: davinci-mcasp 48038000.mcasp: ASoC: Registered DAI '48038000.mcasp' > [ 133.556830] snd_soc_core:snd_soc_add_platform:2892: davinci-mcasp 48038000.mcasp: ASoC: Registered platform '48038000.mcasp' > [ 133.606784] snd_soc_core:soc_bind_dai_link:938: davinci_evm sound: ASoC: binding TLV320AIC3X at idx 0 > [ 133.607118] snd_soc_core:snd_soc_dapm_new_dai_widgets:3494: tlv320aic3x-codec 2-0018: ASoC: adding Playback widget > [ 133.607139] snd_soc_core:snd_soc_dapm_new_dai_widgets:3513: tlv320aic3x-codec 2-0018: ASoC: adding Capture widget > [ 133.607704] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late -2 > [ 133.607724] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late -1 > [ 133.607738] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late 0 > [ 133.607752] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late 1 > [ 133.607766] snd_soc_core:soc_probe_link_dais:1334: davinci_evm sound: ASoC: probe Podtique DaVinci EVM dai link 0 late 2 > [ 133.607805] davinci_evm sound: ASoC: DAPM unknown pin MONO_LOUT > [ 133.627880] snd_soc_core:soc_new_pcm:2510: davinci_evm sound: ASoC: registered pcm #0 AIC3X tlv320aic3x-hifi-0 > [ 133.631201] davinci_evm sound: tlv320aic3x-hifi <-> 48038000.mcasp mapping ok > [ 133.631252] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Right ADC -> Capture > [ 133.631273] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Left ADC -> Capture > [ 133.631294] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Playback -> Right DAC > [ 133.631308] snd_soc_core:snd_soc_dapm_link_dai_widgets:3570: tlv320aic3x-codec 2-0018: Playback -> Left DAC > > > >> >>> >>> >>> # speaker-test -r 22050 -c 2 -f 1000 -F S16_LE -t sine -s 1 -D hw:0,0 >>> >>> >>> WCLK is 11.88 kHz, and it is pulses (DSP mode), rather than high for left, >>> low for right for each channel's word. BCLK is 379.5 kHz. >> >> Sounds like you're not in I2S mode, you must be in DSP or >> left-justified mode. That's set in your eavinci-evm.c in the >> snd_soc_dai_link structure under the field .dai_fmt. Most of them are >> set to SND_SOC_DAIFMT_DSP_B. > > Interesting you mention that. It in fact does set it to DSP mode. Someone else on the list said for stereo, DSP and I2S modes were the same, and I didn't challenge him on that. I don't know how the code that reads the mcasp0 overlay (and thus reads the op-mode=0 part) communicates with the tlv320aic3x.c code to set the correct i2c register, but seems to not be doing that correctly. > > I think it's time I built that tree myself and dropped in some printk() statements. :-/ > > > -- > Rick Mann > rmann@latencyzero.com > >
> On Oct 2, 2015, at 08:25 , Caleb Crome <caleb@crome.org> wrote: > > > Sent from my iPhone > >> On Oct 2, 2015, at 2:55 AM, Rick Mann <rmann@latencyzero.com> wrote: >> >> >> It's pretty exactly 24.00 MHz, ±0.02 MHz. >> > > Oh, it's coming back to me. Perhaps 24 MHz is all the pin can put out. So if you set your sysclk to 24 MHz, then the PLL will get set to the right thing, and give you the right clocks. > > My board has its own clock, so I don't actually use the mclk from the bbb. Well, the other Audio Cape (from Circuitco) seems to get by specifying 12 MHz. I'll try setting it to 24, but it seems weird that they can use 12 and I can't. Maybe they can only use 12 in the 3.8.x kernel, and something broke since then? > > > Also, you can use DSP mode for stereo just fine. I don't think you need to worry about that at all as long as both sides recognize the format. Good to know.
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 5c42d25..6335072 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -34,51 +34,9 @@ }; &am33xx_pinmux { - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { - pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - >; - }; - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { - pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - >; - }; -};