diff mbox

[kvm-unit-tests,PATCHv3,2/3] arm: pmu: Check cycle count increases

Message ID 1444153766-12532-3-git-send-email-cov@codeaurora.org (mailing list archive)
State New, archived
Headers show

Commit Message

Christopher Covington Oct. 6, 2015, 5:49 p.m. UTC
Ensure that reads of the PMCCNTR_EL0 are monotonically increasing,
even for the smallest delta of two subsequent reads.

Signed-off-by: Christopher Covington <cov@codeaurora.org>
---
 arm/pmu.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Andrew Jones Oct. 6, 2015, 7:49 p.m. UTC | #1
On Tue, Oct 06, 2015 at 01:49:25PM -0400, Christopher Covington wrote:
> Ensure that reads of the PMCCNTR_EL0 are monotonically increasing,
> even for the smallest delta of two subsequent reads.
> 
> Signed-off-by: Christopher Covington <cov@codeaurora.org>
> ---
>  arm/pmu.c | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/arm/pmu.c b/arm/pmu.c
> index 91a3688..589e605 100644
> --- a/arm/pmu.c
> +++ b/arm/pmu.c
> @@ -33,6 +33,8 @@ struct pmu_data {
>  	};
>  };
>  
> +static const int samples = 10;

#define NR_SAMPLES 10

> +
>  /* As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't
>   * null. Also print out a couple other interesting fields for diagnostic
>   * purposes. For example, as of fall 2015, QEMU TCG mode doesn't implement
> @@ -56,11 +58,38 @@ static bool check_pmcr(void)
>  	return false;
>  }
>  
> +/* Ensure that the cycle counter progresses between back-to-back reads.
> + */

style nit: your block quotes don't have opening wing (the preferred
kernel style - and, fwiw, my preference too...)

> +static bool check_cycles_increase(void)
> +{
> +	struct pmu_data pmcr;
> +
> +	pmcr.enable = 1;
> +	asm volatile("msr pmcr_el0, %0" : : "r" (pmcr));
> +
> +	for (int i = 0; i < samples; i++) {
> +		int a, b;
> +
> +		asm volatile(
> +			"mrs %[a], pmccntr_el0\n"
> +			"mrs %[b], pmccntr_el0\n"
> +		: [a] "=r" (a), [b] "=r" (b));
> +
> +		if (a >= b) {
> +			printf("Read %d then %d.\n", a, b);
> +			return false;
> +		}
> +	}
> +
> +	return true;
> +}
> +
>  int main(void)
>  {
>  	report_prefix_push("pmu");
>  
>  	report("Control register", check_pmcr());
> +	report("Monotonically increasing cycle count", check_cycles_increase());
>  
>  	return report_summary();
>  }
> -- 
> Qualcomm Innovation Center, Inc.
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 
> 
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diff mbox

Patch

diff --git a/arm/pmu.c b/arm/pmu.c
index 91a3688..589e605 100644
--- a/arm/pmu.c
+++ b/arm/pmu.c
@@ -33,6 +33,8 @@  struct pmu_data {
 	};
 };
 
+static const int samples = 10;
+
 /* As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't
  * null. Also print out a couple other interesting fields for diagnostic
  * purposes. For example, as of fall 2015, QEMU TCG mode doesn't implement
@@ -56,11 +58,38 @@  static bool check_pmcr(void)
 	return false;
 }
 
+/* Ensure that the cycle counter progresses between back-to-back reads.
+ */
+static bool check_cycles_increase(void)
+{
+	struct pmu_data pmcr;
+
+	pmcr.enable = 1;
+	asm volatile("msr pmcr_el0, %0" : : "r" (pmcr));
+
+	for (int i = 0; i < samples; i++) {
+		int a, b;
+
+		asm volatile(
+			"mrs %[a], pmccntr_el0\n"
+			"mrs %[b], pmccntr_el0\n"
+		: [a] "=r" (a), [b] "=r" (b));
+
+		if (a >= b) {
+			printf("Read %d then %d.\n", a, b);
+			return false;
+		}
+	}
+
+	return true;
+}
+
 int main(void)
 {
 	report_prefix_push("pmu");
 
 	report("Control register", check_pmcr());
+	report("Monotonically increasing cycle count", check_cycles_increase());
 
 	return report_summary();
 }