| Message ID | 1444344307-22509-3-git-send-email-moritz.fischer@ettus.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 10/09/2015 12:45 AM, Moritz Fischer wrote: > Added addtional bindings required for FPGA Manager operation > of the Xilinx Zynq Devc configuration interface. > > Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> > --- > arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi > index dc0457e..1a5220e 100644 > --- a/arch/arm/boot/dts/zynq-7000.dtsi > +++ b/arch/arm/boot/dts/zynq-7000.dtsi > @@ -294,6 +294,11 @@ > devcfg: devcfg@f8007000 { > compatible = "xlnx,zynq-devcfg-1.0"; > reg = <0xf8007000 0x100>; > + interrupt-parent = <&intc>; > + interrupts = <0 8 4>; > + clocks = <&clkc 12>; > + clock-names = "ref_clk"; > + syscon = <&slcr>; > }; > > global_timer: timer@f8f00200 { > This patch should go via arm-soc tree. That's why please remove it from this patchset. Thanks, Michal
On Fri, 2015-10-09 at 12:45AM +0200, Moritz Fischer wrote: > Added addtional bindings required for FPGA Manager operation > of the Xilinx Zynq Devc configuration interface. > > Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Sören
Hi Michal, On Mon, Oct 12, 2015 at 2:32 AM, Michal Simek <michal.simek@xilinx.com> wrote: > On 10/09/2015 12:45 AM, Moritz Fischer wrote: >> Added addtional bindings required for FPGA Manager operation >> of the Xilinx Zynq Devc configuration interface. >> >> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> >> --- >> arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi >> index dc0457e..1a5220e 100644 >> --- a/arch/arm/boot/dts/zynq-7000.dtsi >> +++ b/arch/arm/boot/dts/zynq-7000.dtsi >> @@ -294,6 +294,11 @@ >> devcfg: devcfg@f8007000 { >> compatible = "xlnx,zynq-devcfg-1.0"; >> reg = <0xf8007000 0x100>; >> + interrupt-parent = <&intc>; >> + interrupts = <0 8 4>; >> + clocks = <&clkc 12>; >> + clock-names = "ref_clk"; >> + syscon = <&slcr>; >> }; >> >> global_timer: timer@f8f00200 { >> > > This patch should go via arm-soc tree. That's why please remove it from > this patchset. Just to clarify, you want this as a separate patch? > > Thanks, > Michal Cheers, Moritz
On 10/14/2015 04:50 AM, Moritz Fischer wrote: > Hi Michal, > > On Mon, Oct 12, 2015 at 2:32 AM, Michal Simek <michal.simek@xilinx.com> wrote: >> On 10/09/2015 12:45 AM, Moritz Fischer wrote: >>> Added addtional bindings required for FPGA Manager operation >>> of the Xilinx Zynq Devc configuration interface. >>> >>> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> >>> --- >>> arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++ >>> 1 file changed, 5 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi >>> index dc0457e..1a5220e 100644 >>> --- a/arch/arm/boot/dts/zynq-7000.dtsi >>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi >>> @@ -294,6 +294,11 @@ >>> devcfg: devcfg@f8007000 { >>> compatible = "xlnx,zynq-devcfg-1.0"; >>> reg = <0xf8007000 0x100>; >>> + interrupt-parent = <&intc>; >>> + interrupts = <0 8 4>; >>> + clocks = <&clkc 12>; >>> + clock-names = "ref_clk"; >>> + syscon = <&slcr>; >>> }; >>> >>> global_timer: timer@f8f00200 { >>> >> >> This patch should go via arm-soc tree. That's why please remove it from >> this patchset. > > Just to clarify, you want this as a separate patch? yes when binding is ACKed. Thanks, Michal
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index dc0457e..1a5220e 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -294,6 +294,11 @@ devcfg: devcfg@f8007000 { compatible = "xlnx,zynq-devcfg-1.0"; reg = <0xf8007000 0x100>; + interrupt-parent = <&intc>; + interrupts = <0 8 4>; + clocks = <&clkc 12>; + clock-names = "ref_clk"; + syscon = <&slcr>; }; global_timer: timer@f8f00200 {
Added addtional bindings required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> --- arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++ 1 file changed, 5 insertions(+)