| Message ID | 1445243465-7727-1-git-send-email-yao.yuan@freescale.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Oct 19, 2015 at 04:31:05PM +0800, Yuan Yao wrote: The patch overall looks fine, but > > +static int fsl_edma_suspend_late(struct device *dev) This needs protection and will have build failure when CONFIG_PM is not defined > +{ > + struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev); > + struct fsl_edma_chan *fsl_chan; > + unsigned long flags; > + int i; > + > + for (i = 0; i < fsl_edma->n_chans; i++) { > + fsl_chan = &fsl_edma->chans[i]; > + spin_lock_irqsave(&fsl_chan->vchan.lock, flags); > + /* Make sure chan is idle or will force disable. */ > + if (unlikely(!fsl_chan->idle)) { > + dev_warn(dev, "WARN: There is non-idle channel."); > + fsl_edma_disable_request(fsl_chan); > + fsl_edma_chan_mux(fsl_chan, 0, false); > + } > + > + fsl_chan->pm_state = SUSPENDED; > + spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); > + } > + > + return 0; > +} > + > +static int fsl_edma_resume_early(struct device *dev) > +{ > + struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev); > + struct fsl_edma_chan *fsl_chan; > + int i; > + > + for (i = 0; i < fsl_edma->n_chans; i++) { > + fsl_chan = &fsl_edma->chans[i]; > + fsl_chan->pm_state = RUNNING; > + edma_writew(fsl_edma, 0x0, fsl_edma->membase + EDMA_TCD_CSR(i)); > + if (fsl_chan->slave_id != 0) > + fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, true); > + } > + > + edma_writel(fsl_edma, EDMA_CR_ERGA | EDMA_CR_ERCA, > + fsl_edma->membase + EDMA_CR); > + > + return 0; > +} > + > +static const struct dev_pm_ops fsl_edma_pm_ops = { > + .suspend_late = fsl_edma_suspend_late, > + .resume_early = fsl_edma_resume_early, > +}; This one too, also why use late and early, pls add the note here > static const struct of_device_id fsl_edma_dt_ids[] = { > { .compatible = "fsl,vf610-edma", }, > { /* sentinel */ } > @@ -969,6 +1042,7 @@ static struct platform_driver fsl_edma_driver = { > .driver = { > .name = "fsl-edma", > .of_match_table = fsl_edma_dt_ids, > + .pm = &fsl_edma_pm_ops, This will fail too if CONFIG_PM is not defined
Hi Vinod, Thanks for your review. I did the test and it seems that it should be ok when CONFIG_PM is not defined. So I removed the protection code to make it more readable. Do you think is it ok? Best Regards, Yuan Yao > -----Original Message----- > From: Vinod Koul [mailto:vinod.koul@intel.com] > Sent: Tuesday, October 27, 2015 10:01 AM > To: Yuan Yao-B46683 <yao.yuan@freescale.com> > Cc: stefan@agner.ch; arnd@arndb.de; dan.j.williams@intel.com; > dmaengine@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > kernel@lists.infradead.org > Subject: Re: [PATCH v3] dmaengine: fsl-edma: add PM suspend/resume > support > > On Mon, Oct 19, 2015 at 04:31:05PM +0800, Yuan Yao wrote: > > The patch overall looks fine, but > > > > +static int fsl_edma_suspend_late(struct device *dev) > > This needs protection and will have build failure when CONFIG_PM is not > defined > > > +{ > > + struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev); > > + struct fsl_edma_chan *fsl_chan; > > + unsigned long flags; > > + int i; > > + > > + for (i = 0; i < fsl_edma->n_chans; i++) { > > + fsl_chan = &fsl_edma->chans[i]; > > + spin_lock_irqsave(&fsl_chan->vchan.lock, flags); > > + /* Make sure chan is idle or will force disable. */ > > + if (unlikely(!fsl_chan->idle)) { > > + dev_warn(dev, "WARN: There is non-idle channel."); > > + fsl_edma_disable_request(fsl_chan); > > + fsl_edma_chan_mux(fsl_chan, 0, false); > > + } > > + > > + fsl_chan->pm_state = SUSPENDED; > > + spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); > > + } > > + > > + return 0; > > +} > > + > > +static int fsl_edma_resume_early(struct device *dev) { > > + struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev); > > + struct fsl_edma_chan *fsl_chan; > > + int i; > > + > > + for (i = 0; i < fsl_edma->n_chans; i++) { > > + fsl_chan = &fsl_edma->chans[i]; > > + fsl_chan->pm_state = RUNNING; > > + edma_writew(fsl_edma, 0x0, fsl_edma->membase + > EDMA_TCD_CSR(i)); > > + if (fsl_chan->slave_id != 0) > > + fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, > true); > > + } > > + > > + edma_writel(fsl_edma, EDMA_CR_ERGA | EDMA_CR_ERCA, > > + fsl_edma->membase + EDMA_CR); > > + > > + return 0; > > +} > > + > > +static const struct dev_pm_ops fsl_edma_pm_ops = { > > + .suspend_late = fsl_edma_suspend_late, > > + .resume_early = fsl_edma_resume_early, > > +}; > > This one too, also why use late and early, pls add the note here > > > static const struct of_device_id fsl_edma_dt_ids[] = { > > { .compatible = "fsl,vf610-edma", }, > > { /* sentinel */ } > > @@ -969,6 +1042,7 @@ static struct platform_driver fsl_edma_driver = { > > .driver = { > > .name = "fsl-edma", > > .of_match_table = fsl_edma_dt_ids, > > + .pm = &fsl_edma_pm_ops, > This will fail too if CONFIG_PM is not defined > > -- > ~Vinod
On Tue, Oct 27, 2015 at 03:58:31AM +0000, Yao Yuan wrote: > Hi Vinod, > Please do not top post > Thanks for your review. > I did the test and it seems that it should be ok when CONFIG_PM is not defined. > So I removed the protection code to make it more readable. > Do you think is it ok? Yes I did check, this seems okay, pls ignore this comment. You still need to explain why you use late/early calls
diff --git a/drivers/dma/fsl-edma.c b/drivers/dma/fsl-edma.c index 915eec3..6e28e57 100644 --- a/drivers/dma/fsl-edma.c +++ b/drivers/dma/fsl-edma.c @@ -116,6 +116,10 @@ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | \ BIT(DMA_SLAVE_BUSWIDTH_8_BYTES) +enum fsl_edma_pm_state { + RUNNING = 0, + SUSPENDED, +}; struct fsl_edma_hw_tcd { __le32 saddr; @@ -147,6 +151,9 @@ struct fsl_edma_slave_config { struct fsl_edma_chan { struct virt_dma_chan vchan; enum dma_status status; + enum fsl_edma_pm_state pm_state; + bool idle; + u32 slave_id; struct fsl_edma_engine *edma; struct fsl_edma_desc *edesc; struct fsl_edma_slave_config fsc; @@ -298,6 +305,7 @@ static int fsl_edma_terminate_all(struct dma_chan *chan) spin_lock_irqsave(&fsl_chan->vchan.lock, flags); fsl_edma_disable_request(fsl_chan); fsl_chan->edesc = NULL; + fsl_chan->idle = true; vchan_get_all_descriptors(&fsl_chan->vchan, &head); spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); vchan_dma_desc_free_list(&fsl_chan->vchan, &head); @@ -313,6 +321,7 @@ static int fsl_edma_pause(struct dma_chan *chan) if (fsl_chan->edesc) { fsl_edma_disable_request(fsl_chan); fsl_chan->status = DMA_PAUSED; + fsl_chan->idle = true; } spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); return 0; @@ -327,6 +336,7 @@ static int fsl_edma_resume(struct dma_chan *chan) if (fsl_chan->edesc) { fsl_edma_enable_request(fsl_chan); fsl_chan->status = DMA_IN_PROGRESS; + fsl_chan->idle = false; } spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); return 0; @@ -648,6 +658,7 @@ static void fsl_edma_xfer_desc(struct fsl_edma_chan *fsl_chan) fsl_edma_set_tcd_regs(fsl_chan, fsl_chan->edesc->tcd[0].vtcd); fsl_edma_enable_request(fsl_chan); fsl_chan->status = DMA_IN_PROGRESS; + fsl_chan->idle = false; } static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id) @@ -676,6 +687,7 @@ static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id) vchan_cookie_complete(&fsl_chan->edesc->vdesc); fsl_chan->edesc = NULL; fsl_chan->status = DMA_COMPLETE; + fsl_chan->idle = true; } else { vchan_cyclic_callback(&fsl_chan->edesc->vdesc); } @@ -704,6 +716,7 @@ static irqreturn_t fsl_edma_err_handler(int irq, void *dev_id) edma_writeb(fsl_edma, EDMA_CERR_CERR(ch), fsl_edma->membase + EDMA_CERR); fsl_edma->chans[ch].status = DMA_ERROR; + fsl_edma->chans[ch].idle = true; } } return IRQ_HANDLED; @@ -724,6 +737,12 @@ static void fsl_edma_issue_pending(struct dma_chan *chan) spin_lock_irqsave(&fsl_chan->vchan.lock, flags); + if (unlikely(fsl_chan->pm_state != RUNNING)) { + spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); + /* cannot submit due to suspend */ + return; + } + if (vchan_issue_pending(&fsl_chan->vchan) && !fsl_chan->edesc) fsl_edma_xfer_desc(fsl_chan); @@ -735,6 +754,7 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec, { struct fsl_edma_engine *fsl_edma = ofdma->of_dma_data; struct dma_chan *chan, *_chan; + struct fsl_edma_chan *fsl_chan; unsigned long chans_per_mux = fsl_edma->n_chans / DMAMUX_NR; if (dma_spec->args_count != 2) @@ -748,8 +768,10 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec, chan = dma_get_slave_channel(chan); if (chan) { chan->device->privatecnt++; - fsl_edma_chan_mux(to_fsl_edma_chan(chan), - dma_spec->args[1], true); + fsl_chan = to_fsl_edma_chan(chan); + fsl_chan->slave_id = dma_spec->args[1]; + fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, + true); mutex_unlock(&fsl_edma->fsl_edma_mutex); return chan; } @@ -888,7 +910,9 @@ static int fsl_edma_probe(struct platform_device *pdev) struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i]; fsl_chan->edma = fsl_edma; - + fsl_chan->pm_state = RUNNING; + fsl_chan->slave_id = 0; + fsl_chan->idle = true; fsl_chan->vchan.desc_free = fsl_edma_free_desc; vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev); @@ -959,6 +983,55 @@ static int fsl_edma_remove(struct platform_device *pdev) return 0; } +static int fsl_edma_suspend_late(struct device *dev) +{ + struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev); + struct fsl_edma_chan *fsl_chan; + unsigned long flags; + int i; + + for (i = 0; i < fsl_edma->n_chans; i++) { + fsl_chan = &fsl_edma->chans[i]; + spin_lock_irqsave(&fsl_chan->vchan.lock, flags); + /* Make sure chan is idle or will force disable. */ + if (unlikely(!fsl_chan->idle)) { + dev_warn(dev, "WARN: There is non-idle channel."); + fsl_edma_disable_request(fsl_chan); + fsl_edma_chan_mux(fsl_chan, 0, false); + } + + fsl_chan->pm_state = SUSPENDED; + spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); + } + + return 0; +} + +static int fsl_edma_resume_early(struct device *dev) +{ + struct fsl_edma_engine *fsl_edma = dev_get_drvdata(dev); + struct fsl_edma_chan *fsl_chan; + int i; + + for (i = 0; i < fsl_edma->n_chans; i++) { + fsl_chan = &fsl_edma->chans[i]; + fsl_chan->pm_state = RUNNING; + edma_writew(fsl_edma, 0x0, fsl_edma->membase + EDMA_TCD_CSR(i)); + if (fsl_chan->slave_id != 0) + fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, true); + } + + edma_writel(fsl_edma, EDMA_CR_ERGA | EDMA_CR_ERCA, + fsl_edma->membase + EDMA_CR); + + return 0; +} + +static const struct dev_pm_ops fsl_edma_pm_ops = { + .suspend_late = fsl_edma_suspend_late, + .resume_early = fsl_edma_resume_early, +}; + static const struct of_device_id fsl_edma_dt_ids[] = { { .compatible = "fsl,vf610-edma", }, { /* sentinel */ } @@ -969,6 +1042,7 @@ static struct platform_driver fsl_edma_driver = { .driver = { .name = "fsl-edma", .of_match_table = fsl_edma_dt_ids, + .pm = &fsl_edma_pm_ops, }, .probe = fsl_edma_probe, .remove = fsl_edma_remove,
This add power management suspend/resume support for the fsl-edma driver. eDMA acted as a basic function used by others. What it needs to do is the two steps below to support power management. In fsl_edma_suspend_late: Check whether the DMA chan is idle, if it is not idle disable DMA request. In fsl_edma_resume_early: Enable the eDMA and wait for being used. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> --- drivers/dma/fsl-edma.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 77 insertions(+), 3 deletions(-)