| Message ID | 1446553874-22986-6-git-send-email-patrik.jakobsson@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Nov 03, 2015 at 01:31:11PM +0100, Patrik Jakobsson wrote: > PG2 enabled is not a requirement for disabling DC5. It's just one > of the reasons why we wouldn't enter DC5. During modeset we don't care > about PG2 from a DC perspective, only the fact that DC5/DC6 is not > allowed. > > Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> PW2 must be disabled before enabling DC5, and conversely DC5 must be disabled before enabling PW2. So yeah, asserting that PW2 must be enabled before disabling DC5 doesn't make sense. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index d0ed38b..c901b19 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -483,8 +483,6 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv) > > static void assert_can_disable_dc5(struct drm_i915_private *dev_priv) > { > - bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv, > - SKL_DISP_PW_2); > /* > * During initialization, the firmware may not be loaded yet. > * We still want to make sure that the DC enabling flag is cleared. > @@ -492,7 +490,6 @@ static void assert_can_disable_dc5(struct drm_i915_private *dev_priv) > if (dev_priv->power_domains.initializing) > return; > > - WARN_ONCE(!pg2_enabled, "PG2 not enabled to disable DC5.\n"); > WARN_ONCE(dev_priv->pm.suspended, > "Disabling of DC5 while platform is runtime-suspended should never happen.\n"); > } > -- > 2.1.4
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index d0ed38b..c901b19 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -483,8 +483,6 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv) static void assert_can_disable_dc5(struct drm_i915_private *dev_priv) { - bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv, - SKL_DISP_PW_2); /* * During initialization, the firmware may not be loaded yet. * We still want to make sure that the DC enabling flag is cleared. @@ -492,7 +490,6 @@ static void assert_can_disable_dc5(struct drm_i915_private *dev_priv) if (dev_priv->power_domains.initializing) return; - WARN_ONCE(!pg2_enabled, "PG2 not enabled to disable DC5.\n"); WARN_ONCE(dev_priv->pm.suspended, "Disabling of DC5 while platform is runtime-suspended should never happen.\n"); }
PG2 enabled is not a requirement for disabling DC5. It's just one of the reasons why we wouldn't enter DC5. During modeset we don't care about PG2 from a DC perspective, only the fact that DC5/DC6 is not allowed. Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 3 --- 1 file changed, 3 deletions(-)