| Message ID | 1445594525-7174-8-git-send-email-ander.conselvan.de.oliveira@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> On 10/23/2015 3:31 PM, Ander Conselvan de Oliveira wrote: > The function name implies it should get intel_dp, and it mostly used > where there is an intel_dp in the context. > > Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 19 +++++++++++-------- > drivers/gpu/drm/i915/intel_dp_link_training.c | 4 +--- > drivers/gpu/drm/i915/intel_drv.h | 2 +- > 3 files changed, 13 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 5b04ade..5344de4 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1189,8 +1189,11 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) > return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; > } > > -bool intel_dp_source_supports_hbr2(struct drm_device *dev) > +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp) > { > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > + struct drm_device *dev = dig_port->base.base.dev; > + > /* WaDisableHBR2:skl */ > if (IS_SKL_REVID(dev, 0, SKL_REVID_B0)) > return false; > @@ -1203,8 +1206,10 @@ bool intel_dp_source_supports_hbr2(struct drm_device *dev) > } > > static int > -intel_dp_source_rates(struct drm_device *dev, const int **source_rates) > +intel_dp_source_rates(struct intel_dp *intel_dp, const int **source_rates) > { > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > + struct drm_device *dev = dig_port->base.base.dev; > int size; > > if (IS_BROXTON(dev)) { > @@ -1219,7 +1224,7 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates) > } > > /* This depends on the fact that 5.4 is last value in the array */ > - if (!intel_dp_source_supports_hbr2(dev)) > + if (!intel_dp_source_supports_hbr2(intel_dp)) > size--; > > return size; > @@ -1284,12 +1289,11 @@ static int intersect_rates(const int *source_rates, int source_len, > static int intel_dp_common_rates(struct intel_dp *intel_dp, > int *common_rates) > { > - struct drm_device *dev = intel_dp_to_dev(intel_dp); > const int *source_rates, *sink_rates; > int source_len, sink_len; > > sink_len = intel_dp_sink_rates(intel_dp, &sink_rates); > - source_len = intel_dp_source_rates(dev, &source_rates); > + source_len = intel_dp_source_rates(intel_dp, &source_rates); > > return intersect_rates(source_rates, source_len, > sink_rates, sink_len, > @@ -1314,7 +1318,6 @@ static void snprintf_int_array(char *str, size_t len, > > static void intel_dp_print_rates(struct intel_dp *intel_dp) > { > - struct drm_device *dev = intel_dp_to_dev(intel_dp); > const int *source_rates, *sink_rates; > int source_len, sink_len, common_len; > int common_rates[DP_MAX_SUPPORTED_RATES]; > @@ -1323,7 +1326,7 @@ static void intel_dp_print_rates(struct intel_dp *intel_dp) > if ((drm_debug & DRM_UT_KMS) == 0) > return; > > - source_len = intel_dp_source_rates(dev, &source_rates); > + source_len = intel_dp_source_rates(intel_dp, &source_rates); > snprintf_int_array(str, sizeof(str), source_rates, source_len); > DRM_DEBUG_KMS("source rates: %s\n", str); > > @@ -3711,7 +3714,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) > } > > DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n", > - yesno(intel_dp_source_supports_hbr2(dev)), > + yesno(intel_dp_source_supports_hbr2(intel_dp)), > yesno(drm_dp_tps3_supported(intel_dp->dpcd))); > > /* Intermediate frequency support */ > diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c > index bb036d5..8888793 100644 > --- a/drivers/gpu/drm/i915/intel_dp_link_training.c > +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c > @@ -218,8 +218,6 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) > static void > intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) > { > - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > - struct drm_device *dev = dig_port->base.base.dev; > bool channel_eq = false; > int tries, cr_tries; > uint32_t training_pattern = DP_TRAINING_PATTERN_2; > @@ -233,7 +231,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) > * Due to WaDisableHBR2 SKL < B0 is the only exception where TPS3 is > * supported but still not enabled. > */ > - if (intel_dp_source_supports_hbr2(dev) && > + if (intel_dp_source_supports_hbr2(intel_dp) && > drm_dp_tps3_supported(intel_dp->dpcd)) > training_pattern = DP_TRAINING_PATTERN_3; > else if (intel_dp->link_rate == 540000) > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 1c2a8ed..3021e40 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1252,7 +1252,7 @@ uint8_t > intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing); > void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, > uint8_t *link_bw, uint8_t *rate_select); > -bool intel_dp_source_supports_hbr2(struct drm_device *dev); > +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); > bool > intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); >
On Sun, 2015-10-25 at 08:18 +0530, Thulasimani, Sivakumar wrote: > Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> Thanks for reviewing. I pushed the patches up to here. Ander > On 10/23/2015 3:31 PM, Ander Conselvan de Oliveira wrote: > > The function name implies it should get intel_dp, and it mostly used > > where there is an intel_dp in the context. > > > > Signed-off-by: Ander Conselvan de Oliveira < > > ander.conselvan.de.oliveira@intel.com> > > --- > > drivers/gpu/drm/i915/intel_dp.c | 19 +++++++++++-------- > > drivers/gpu/drm/i915/intel_dp_link_training.c | 4 +--- > > drivers/gpu/drm/i915/intel_drv.h | 2 +- > > 3 files changed, 13 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c > > b/drivers/gpu/drm/i915/intel_dp.c > > index 5b04ade..5344de4 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -1189,8 +1189,11 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const > > int **sink_rates) > > return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; > > } > > > > -bool intel_dp_source_supports_hbr2(struct drm_device *dev) > > +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp) > > { > > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > > + struct drm_device *dev = dig_port->base.base.dev; > > + > > /* WaDisableHBR2:skl */ > > if (IS_SKL_REVID(dev, 0, SKL_REVID_B0)) > > return false; > > @@ -1203,8 +1206,10 @@ bool intel_dp_source_supports_hbr2(struct drm_device > > *dev) > > } > > > > static int > > -intel_dp_source_rates(struct drm_device *dev, const int **source_rates) > > +intel_dp_source_rates(struct intel_dp *intel_dp, const int **source_rates) > > { > > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > > + struct drm_device *dev = dig_port->base.base.dev; > > int size; > > > > if (IS_BROXTON(dev)) { > > @@ -1219,7 +1224,7 @@ intel_dp_source_rates(struct drm_device *dev, const > > int **source_rates) > > } > > > > /* This depends on the fact that 5.4 is last value in the array */ > > - if (!intel_dp_source_supports_hbr2(dev)) > > + if (!intel_dp_source_supports_hbr2(intel_dp)) > > size--; > > > > return size; > > @@ -1284,12 +1289,11 @@ static int intersect_rates(const int *source_rates, > > int source_len, > > static int intel_dp_common_rates(struct intel_dp *intel_dp, > > int *common_rates) > > { > > - struct drm_device *dev = intel_dp_to_dev(intel_dp); > > const int *source_rates, *sink_rates; > > int source_len, sink_len; > > > > sink_len = intel_dp_sink_rates(intel_dp, &sink_rates); > > - source_len = intel_dp_source_rates(dev, &source_rates); > > + source_len = intel_dp_source_rates(intel_dp, &source_rates); > > > > return intersect_rates(source_rates, source_len, > > sink_rates, sink_len, > > @@ -1314,7 +1318,6 @@ static void snprintf_int_array(char *str, size_t len, > > > > static void intel_dp_print_rates(struct intel_dp *intel_dp) > > { > > - struct drm_device *dev = intel_dp_to_dev(intel_dp); > > const int *source_rates, *sink_rates; > > int source_len, sink_len, common_len; > > int common_rates[DP_MAX_SUPPORTED_RATES]; > > @@ -1323,7 +1326,7 @@ static void intel_dp_print_rates(struct intel_dp > > *intel_dp) > > if ((drm_debug & DRM_UT_KMS) == 0) > > return; > > > > - source_len = intel_dp_source_rates(dev, &source_rates); > > + source_len = intel_dp_source_rates(intel_dp, &source_rates); > > snprintf_int_array(str, sizeof(str), source_rates, source_len); > > DRM_DEBUG_KMS("source rates: %s\n", str); > > > > @@ -3711,7 +3714,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) > > } > > > > DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n", > > - yesno(intel_dp_source_supports_hbr2(dev)), > > + yesno(intel_dp_source_supports_hbr2(intel_dp)), > > yesno(drm_dp_tps3_supported(intel_dp->dpcd))); > > > > /* Intermediate frequency support */ > > diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c > > b/drivers/gpu/drm/i915/intel_dp_link_training.c > > index bb036d5..8888793 100644 > > --- a/drivers/gpu/drm/i915/intel_dp_link_training.c > > +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c > > @@ -218,8 +218,6 @@ intel_dp_link_training_clock_recovery(struct intel_dp > > *intel_dp) > > static void > > intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) > > { > > - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > > - struct drm_device *dev = dig_port->base.base.dev; > > bool channel_eq = false; > > int tries, cr_tries; > > uint32_t training_pattern = DP_TRAINING_PATTERN_2; > > @@ -233,7 +231,7 @@ intel_dp_link_training_channel_equalization(struct > > intel_dp *intel_dp) > > * Due to WaDisableHBR2 SKL < B0 is the only exception where TPS3 > > is > > * supported but still not enabled. > > */ > > - if (intel_dp_source_supports_hbr2(dev) && > > + if (intel_dp_source_supports_hbr2(intel_dp) && > > drm_dp_tps3_supported(intel_dp->dpcd)) > > training_pattern = DP_TRAINING_PATTERN_3; > > else if (intel_dp->link_rate == 540000) > > diff --git a/drivers/gpu/drm/i915/intel_drv.h > > b/drivers/gpu/drm/i915/intel_drv.h > > index 1c2a8ed..3021e40 100644 > > --- a/drivers/gpu/drm/i915/intel_drv.h > > +++ b/drivers/gpu/drm/i915/intel_drv.h > > @@ -1252,7 +1252,7 @@ uint8_t > > intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t > > voltage_swing); > > void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, > > uint8_t *link_bw, uint8_t *rate_select); > > -bool intel_dp_source_supports_hbr2(struct drm_device *dev); > > +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); > > bool > > intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t > > link_status[DP_LINK_STATUS_SIZE]); > > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 5b04ade..5344de4 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1189,8 +1189,11 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; } -bool intel_dp_source_supports_hbr2(struct drm_device *dev) +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp) { + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); + struct drm_device *dev = dig_port->base.base.dev; + /* WaDisableHBR2:skl */ if (IS_SKL_REVID(dev, 0, SKL_REVID_B0)) return false; @@ -1203,8 +1206,10 @@ bool intel_dp_source_supports_hbr2(struct drm_device *dev) } static int -intel_dp_source_rates(struct drm_device *dev, const int **source_rates) +intel_dp_source_rates(struct intel_dp *intel_dp, const int **source_rates) { + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); + struct drm_device *dev = dig_port->base.base.dev; int size; if (IS_BROXTON(dev)) { @@ -1219,7 +1224,7 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates) } /* This depends on the fact that 5.4 is last value in the array */ - if (!intel_dp_source_supports_hbr2(dev)) + if (!intel_dp_source_supports_hbr2(intel_dp)) size--; return size; @@ -1284,12 +1289,11 @@ static int intersect_rates(const int *source_rates, int source_len, static int intel_dp_common_rates(struct intel_dp *intel_dp, int *common_rates) { - struct drm_device *dev = intel_dp_to_dev(intel_dp); const int *source_rates, *sink_rates; int source_len, sink_len; sink_len = intel_dp_sink_rates(intel_dp, &sink_rates); - source_len = intel_dp_source_rates(dev, &source_rates); + source_len = intel_dp_source_rates(intel_dp, &source_rates); return intersect_rates(source_rates, source_len, sink_rates, sink_len, @@ -1314,7 +1318,6 @@ static void snprintf_int_array(char *str, size_t len, static void intel_dp_print_rates(struct intel_dp *intel_dp) { - struct drm_device *dev = intel_dp_to_dev(intel_dp); const int *source_rates, *sink_rates; int source_len, sink_len, common_len; int common_rates[DP_MAX_SUPPORTED_RATES]; @@ -1323,7 +1326,7 @@ static void intel_dp_print_rates(struct intel_dp *intel_dp) if ((drm_debug & DRM_UT_KMS) == 0) return; - source_len = intel_dp_source_rates(dev, &source_rates); + source_len = intel_dp_source_rates(intel_dp, &source_rates); snprintf_int_array(str, sizeof(str), source_rates, source_len); DRM_DEBUG_KMS("source rates: %s\n", str); @@ -3711,7 +3714,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) } DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n", - yesno(intel_dp_source_supports_hbr2(dev)), + yesno(intel_dp_source_supports_hbr2(intel_dp)), yesno(drm_dp_tps3_supported(intel_dp->dpcd))); /* Intermediate frequency support */ diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c index bb036d5..8888793 100644 --- a/drivers/gpu/drm/i915/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c @@ -218,8 +218,6 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) static void intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) { - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); - struct drm_device *dev = dig_port->base.base.dev; bool channel_eq = false; int tries, cr_tries; uint32_t training_pattern = DP_TRAINING_PATTERN_2; @@ -233,7 +231,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) * Due to WaDisableHBR2 SKL < B0 is the only exception where TPS3 is * supported but still not enabled. */ - if (intel_dp_source_supports_hbr2(dev) && + if (intel_dp_source_supports_hbr2(intel_dp) && drm_dp_tps3_supported(intel_dp->dpcd)) training_pattern = DP_TRAINING_PATTERN_3; else if (intel_dp->link_rate == 540000) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1c2a8ed..3021e40 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1252,7 +1252,7 @@ uint8_t intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing); void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, uint8_t *link_bw, uint8_t *rate_select); -bool intel_dp_source_supports_hbr2(struct drm_device *dev); +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); bool intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]);
The function name implies it should get intel_dp, and it mostly used where there is an intel_dp in the context. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> --- drivers/gpu/drm/i915/intel_dp.c | 19 +++++++++++-------- drivers/gpu/drm/i915/intel_dp_link_training.c | 4 +--- drivers/gpu/drm/i915/intel_drv.h | 2 +- 3 files changed, 13 insertions(+), 12 deletions(-)