diff mbox

Shut up unhandled MSR warnings

Message ID 20151112101317.GA3649@pd.tnic (mailing list archive)
State New, archived
Headers show

Commit Message

Borislav Petkov Nov. 12, 2015, 10:13 a.m. UTC
Hey Paolo,

do we apply stuff like that below?

When booting guests all the time here, dmesg gets filled up with those
"unhandled rdmsr" useless warnings. The patch below shuts them up.

The only problem is that the IC CFG MSR has those fields
defined starting from F15h and I don't see a way to check the
family/model/stepping of the guest CPU in kvm. Is there?

Thanks.

---

Comments

Paolo Bonzini Nov. 12, 2015, 10:33 a.m. UTC | #1
On 12/11/2015 11:13, Borislav Petkov wrote:
> Hey Paolo,
> 
> do we apply stuff like that below?

If we really need to, we do.

> When booting guests all the time here, dmesg gets filled up with those
> "unhandled rdmsr" useless warnings. The patch below shuts them up.
> 
> The only problem is that the IC CFG MSR has those fields
> defined starting from F15h and I don't see a way to check the
> family/model/stepping of the guest CPU in kvm. Is there?

Yes, see guest_cpuid_has_* for an example of reading the CPUID values.

But if it's defined for _all_ models starting at family 21, we can just
do it unconditionally.

Paolo
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Borislav Petkov Nov. 12, 2015, 10:59 a.m. UTC | #2
On Thu, Nov 12, 2015 at 11:33:33AM +0100, Paolo Bonzini wrote:
> Yes, see guest_cpuid_has_* for an example of reading the CPUID values.
> 
> But if it's defined for _all_ models starting at family 21, we can just
> do it unconditionally.

The thing is, those bits are Reserved again on the next family 22. Lemme
take a look at guest_cpuid_has_* and see how ugly it gets.

Thanks.
Borislav Petkov Nov. 12, 2015, 12:16 p.m. UTC | #3
On Thu, Nov 12, 2015 at 11:59:58AM +0100, Borislav Petkov wrote:
> On Thu, Nov 12, 2015 at 11:33:33AM +0100, Paolo Bonzini wrote:
> > Yes, see guest_cpuid_has_* for an example of reading the CPUID values.
> > 
> > But if it's defined for _all_ models starting at family 21, we can just
> > do it unconditionally.
> 
> The thing is, those bits are Reserved again on the next family 22. Lemme
> take a look at guest_cpuid_has_* and see how ugly it gets.

Ok, I see there's guest_cpuid_is_amd() but I'd need also family and model.

How about adding also

guest_cpuid_family(), guest_cpuid_model(), guest_cpuid_stepping()? Those
could be quite useful in other contexts maybe.

Or, I can do a single function which simply returns CPUID_1_EAX of the
guest vcpu and caller can then pick stuff apart...

Thoughts?
Paolo Bonzini Nov. 12, 2015, 12:28 p.m. UTC | #4
On 12/11/2015 13:16, Borislav Petkov wrote:
>>> > > Yes, see guest_cpuid_has_* for an example of reading the CPUID values.
>>> > > 
>>> > > But if it's defined for _all_ models starting at family 21, we can just
>>> > > do it unconditionally.
>> > 
>> > The thing is, those bits are Reserved again on the next family 22. Lemme
>> > take a look at guest_cpuid_has_* and see how ugly it gets.
> 
> Ok, I see there's guest_cpuid_is_amd() but I'd need also family and model.
> 
> How about adding also
> 
> guest_cpuid_family(), guest_cpuid_model(), guest_cpuid_stepping()? Those
> could be quite useful in other contexts maybe.

Sure, that's what I meant by "for an example". :)

Paolo
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diff mbox

Patch

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index b8c14bb7fc8f..08b880818fb9 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -315,6 +315,7 @@ 
 #define MSR_F15H_PERF_CTR		0xc0010201
 #define MSR_F15H_NB_PERF_CTL		0xc0010240
 #define MSR_F15H_NB_PERF_CTR		0xc0010241
+#define MSR_F15H_IC_CFG			0xc0011021
 
 /* Fam 10h MSRs */
 #define MSR_FAM10H_MMIO_CONF_BASE	0xc0010058
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 4a70fc6d400a..1d76dcdf7e55 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -665,9 +665,9 @@  static void init_amd_bd(struct cpuinfo_x86 *c)
 	 * Disable it on the affected CPUs.
 	 */
 	if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
-		if (!rdmsrl_safe(0xc0011021, &value) && !(value & 0x1E)) {
+		if (!rdmsrl_safe(MSR_F15H_IC_CFG, &value) && !(value & 0x1E)) {
 			value |= 0x1E;
-			wrmsrl_safe(0xc0011021, value);
+			wrmsrl_safe(MSR_F15H_IC_CFG, value);
 		}
 	}
 }
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 2f9ed1ff0632..7948cdeacbfe 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3141,6 +3141,9 @@  static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 	case MSR_IA32_UCODE_REV:
 		msr_info->data = 0x01000065;
 		break;
+	case MSR_F15H_IC_CFG:
+		msr_info->data = 0x1E;
+		break;
 	default:
 		return kvm_get_msr_common(vcpu, msr_info);
 	}