Message ID | 1448964010-18207-13-git-send-email-architt@codeaurora.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Dec 01, 2015 at 03:30:10PM +0530, Archit Taneja wrote: > Add additional property info needed for DSIv2 DT. > > Cc: devicetree@vger.kernel.org > Cc: Rob Herring <robh@kernel.org> > > Signed-off-by: Archit Taneja <architt@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> > --- > Documentation/devicetree/bindings/display/msm/dsi.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt > index e097955..e7423be 100644 > --- a/Documentation/devicetree/bindings/display/msm/dsi.txt > +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt > @@ -21,10 +21,13 @@ Required properties: > * "byte_clk" > * "pixel_clk" > * "core_clk" > + For DSIv2, we need an additional clock: > + * "src_clk" > - vdd-supply: phandle to vdd regulator device node > - vddio-supply: phandle to vdd-io regulator device node > - vdda-supply: phandle to vdda regulator device node > - qcom,dsi-phy: phandle to DSI PHY device node > +- syscon-sfpb: A phandle to mmss_sfpb syscon node (only for DSIv2) > > Optional properties: > - panel@0: Node of panel connected to this DSI controller. > @@ -51,6 +54,7 @@ Required properties: > * "qcom,dsi-phy-28nm-hpm" > * "qcom,dsi-phy-28nm-lp" > * "qcom,dsi-phy-20nm" > + * "qcom,dsi-phy-28nm-8960" > - reg: Physical base address and length of the registers of PLL, PHY and PHY > regulator > - reg-names: The names of register regions. The following regions are required: > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > hosted by The Linux Foundation >
diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt index e097955..e7423be 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi.txt +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt @@ -21,10 +21,13 @@ Required properties: * "byte_clk" * "pixel_clk" * "core_clk" + For DSIv2, we need an additional clock: + * "src_clk" - vdd-supply: phandle to vdd regulator device node - vddio-supply: phandle to vdd-io regulator device node - vdda-supply: phandle to vdda regulator device node - qcom,dsi-phy: phandle to DSI PHY device node +- syscon-sfpb: A phandle to mmss_sfpb syscon node (only for DSIv2) Optional properties: - panel@0: Node of panel connected to this DSI controller. @@ -51,6 +54,7 @@ Required properties: * "qcom,dsi-phy-28nm-hpm" * "qcom,dsi-phy-28nm-lp" * "qcom,dsi-phy-20nm" + * "qcom,dsi-phy-28nm-8960" - reg: Physical base address and length of the registers of PLL, PHY and PHY regulator - reg-names: The names of register regions. The following regions are required:
Add additional property info needed for DSIv2 DT. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> --- Documentation/devicetree/bindings/display/msm/dsi.txt | 4 ++++ 1 file changed, 4 insertions(+)