diff mbox

[v3,2/2] dts/ls2080a: Update DTSI to add support of SP805 WDT

Message ID 1450189825-29065-3-git-send-email-bhupesh.sharma@freescale.com (mailing list archive)
State New, archived
Headers show

Commit Message

bhupesh.sharma@freescale.com Dec. 15, 2015, 2:30 p.m. UTC
This patch updates the LS2080a DTSI (DTS Include) file to add
support for eight SP805 Watchdog units which can be used to
reset the eight Cortex-A57 cores available on LS2080A.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   56 ++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

Comments

Bhupesh Sharma Dec. 23, 2015, 5:23 a.m. UTC | #1
Hi Arnd, Olof, Kevin

On Tue, Dec 15, 2015 at 8:00 PM, Bhupesh Sharma
<bhupesh.sharma@freescale.com> wrote:
> This patch updates the LS2080a DTSI (DTS Include) file to add
> support for eight SP805 Watchdog units which can be used to
> reset the eight Cortex-A57 cores available on LS2080A.
>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   56 ++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)

Since Rob has acked the SP805 WDT binding documentation patch (patch
1/2 of this series),
can this DTSI change, please be considered for absorption in the arm-soc tree.

Regards,
Bhupesh

>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> index e81cd48..7b0f411 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> @@ -193,6 +193,62 @@
>                         interrupts = <0 32 0x4>; /* Level high type */
>                 };
>
> +               cluster1_core0_watchdog: wdt@c000000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc000000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
> +               cluster1_core1_watchdog: wdt@c010000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc010000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
> +               cluster2_core0_watchdog: wdt@c100000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc100000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
> +               cluster2_core1_watchdog: wdt@c110000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc110000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
> +               cluster3_core0_watchdog: wdt@c200000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc200000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
> +               cluster3_core1_watchdog: wdt@c210000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc210000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
> +               cluster4_core0_watchdog: wdt@c300000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc300000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
> +               cluster4_core1_watchdog: wdt@c310000 {
> +                       compatible = "arm,sp805-wdt", "arm,primecell";
> +                       reg = <0x0 0xc310000 0x0 0x1000>;
> +                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
> +                       clock-names = "apb_pclk", "wdog_clk";
> +               };
> +
>                 fsl_mc: fsl-mc@80c000000 {
>                         compatible = "fsl,qoriq-mc";
>                         reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
> --
> 1.7.9.5
>
>
Arnd Bergmann Dec. 24, 2015, 10:18 a.m. UTC | #2
On Wednesday 23 December 2015, Bhupesh SHARMA wrote:
> 
> Hi Arnd, Olof, Kevin
> 
> On Tue, Dec 15, 2015 at 8:00 PM, Bhupesh Sharma
> <bhupesh.sharma@freescale.com> wrote:
> > This patch updates the LS2080a DTSI (DTS Include) file to add
> > support for eight SP805 Watchdog units which can be used to
> > reset the eight Cortex-A57 cores available on LS2080A.
> >
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   56 ++++++++++++++++++++++++
> >  1 file changed, 56 insertions(+)
> 
> Since Rob has acked the SP805 WDT binding documentation patch (patch
> 1/2 of this series),
> can this DTSI change, please be considered for absorption in the arm-soc tree.

Sure, please submit it for inclusion. Who is the maintainer for
arch/arm64/boot/dts/freescale/ ? Can they pick up all the freescale related
dts changes and submit them as a pull request? Should they go through
Shawn's tree maybe?

	Arnd
bhupesh.sharma@freescale.com Dec. 24, 2015, 8:41 p.m. UTC | #3
> -----Original Message-----
> From: Arnd Bergmann [mailto:arnd@arndb.de]
> Sent: Thursday, December 24, 2015 3:49 PM
> To: Bhupesh SHARMA
> Cc: Sharma Bhupesh-B45370; Mark Rutland; linux-arm-
> kernel@lists.infradead.org; Olof Johansson; devicetree@vger.kernel.org;
> Rob Herring; Will Deacon; Catalin Marinas; Li Yang-Leo-R58472; Wood
> Scott-B07421; Yoder Stuart-B08248; shawn.guo@linaro.org
> Subject: Re: [PATCH v3 2/2] dts/ls2080a: Update DTSI to add support of
> SP805 WDT
> 
> On Wednesday 23 December 2015, Bhupesh SHARMA wrote:
> >
> > Hi Arnd, Olof, Kevin
> >
> > On Tue, Dec 15, 2015 at 8:00 PM, Bhupesh Sharma
> > <bhupesh.sharma@freescale.com> wrote:
> > > This patch updates the LS2080a DTSI (DTS Include) file to add
> > > support for eight SP805 Watchdog units which can be used to reset
> > > the eight Cortex-A57 cores available on LS2080A.
> > >
> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
> > > ---
> > >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   56
> ++++++++++++++++++++++++
> > >  1 file changed, 56 insertions(+)
> >
> > Since Rob has acked the SP805 WDT binding documentation patch (patch
> > 1/2 of this series),
> > can this DTSI change, please be considered for absorption in the arm-
> soc tree.
> 
> Sure, please submit it for inclusion. Who is the maintainer for
> arch/arm64/boot/dts/freescale/ ? Can they pick up all the freescale
> related dts changes and submit them as a pull request? Should they go
> through Shawn's tree maybe?

Thanks Arnd. For now, may-be I can send this patchset with Rob's Acked-by added
for 1/2 to 'arm@kernel.org'. So that this can be picked by via the arm-soc tree.
Shawn, I hope it's ok with you.

In the meanwhile, I will discuss internally as to how we can have in place a freescale maintainer,
who can submit the pull requests to the 'arm-soc' tree.

Regards,
Bhupesh
Shawn Guo Dec. 25, 2015, 1:56 a.m. UTC | #4
On Thu, Dec 24, 2015 at 08:41:54PM +0000, Sharma Bhupesh wrote:
> 
> 
> > -----Original Message-----
> > From: Arnd Bergmann [mailto:arnd@arndb.de]
> > Sent: Thursday, December 24, 2015 3:49 PM
> > To: Bhupesh SHARMA
> > Cc: Sharma Bhupesh-B45370; Mark Rutland; linux-arm-
> > kernel@lists.infradead.org; Olof Johansson; devicetree@vger.kernel.org;
> > Rob Herring; Will Deacon; Catalin Marinas; Li Yang-Leo-R58472; Wood
> > Scott-B07421; Yoder Stuart-B08248; shawn.guo@linaro.org
> > Subject: Re: [PATCH v3 2/2] dts/ls2080a: Update DTSI to add support of
> > SP805 WDT
> > 
> > On Wednesday 23 December 2015, Bhupesh SHARMA wrote:
> > >
> > > Hi Arnd, Olof, Kevin
> > >
> > > On Tue, Dec 15, 2015 at 8:00 PM, Bhupesh Sharma
> > > <bhupesh.sharma@freescale.com> wrote:
> > > > This patch updates the LS2080a DTSI (DTS Include) file to add
> > > > support for eight SP805 Watchdog units which can be used to reset
> > > > the eight Cortex-A57 cores available on LS2080A.
> > > >
> > > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   56
> > ++++++++++++++++++++++++
> > > >  1 file changed, 56 insertions(+)
> > >
> > > Since Rob has acked the SP805 WDT binding documentation patch (patch
> > > 1/2 of this series),
> > > can this DTSI change, please be considered for absorption in the arm-
> > soc tree.
> > 
> > Sure, please submit it for inclusion. Who is the maintainer for
> > arch/arm64/boot/dts/freescale/ ? Can they pick up all the freescale
> > related dts changes and submit them as a pull request? Should they go
> > through Shawn's tree maybe?
> 
> Thanks Arnd. For now, may-be I can send this patchset with Rob's Acked-by added
> for 1/2 to 'arm@kernel.org'. So that this can be picked by via the arm-soc tree.
> Shawn, I hope it's ok with you.

Yeah.  I'm maintaining a git tree, collecting all Freescale arm32
platform patches, and sending them to arm-soc for each merge window.
If I can be copied on those arm64 patches, I do not mind handling them
together with arm32 ones.

Shawn
Bhupesh Sharma Dec. 28, 2015, 9:48 a.m. UTC | #5
On Fri, Dec 25, 2015 at 7:26 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Thu, Dec 24, 2015 at 08:41:54PM +0000, Sharma Bhupesh wrote:
>>
>>
>> > -----Original Message-----
>> > From: Arnd Bergmann [mailto:arnd@arndb.de]
>> > Sent: Thursday, December 24, 2015 3:49 PM
>> > To: Bhupesh SHARMA
>> > Cc: Sharma Bhupesh-B45370; Mark Rutland; linux-arm-
>> > kernel@lists.infradead.org; Olof Johansson; devicetree@vger.kernel.org;
>> > Rob Herring; Will Deacon; Catalin Marinas; Li Yang-Leo-R58472; Wood
>> > Scott-B07421; Yoder Stuart-B08248; shawn.guo@linaro.org
>> > Subject: Re: [PATCH v3 2/2] dts/ls2080a: Update DTSI to add support of
>> > SP805 WDT
>> >
>> > On Wednesday 23 December 2015, Bhupesh SHARMA wrote:
>> > >
>> > > Hi Arnd, Olof, Kevin
>> > >
>> > > On Tue, Dec 15, 2015 at 8:00 PM, Bhupesh Sharma
>> > > <bhupesh.sharma@freescale.com> wrote:
>> > > > This patch updates the LS2080a DTSI (DTS Include) file to add
>> > > > support for eight SP805 Watchdog units which can be used to reset
>> > > > the eight Cortex-A57 cores available on LS2080A.
>> > > >
>> > > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
>> > > > ---
>> > > >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   56
>> > ++++++++++++++++++++++++
>> > > >  1 file changed, 56 insertions(+)
>> > >
>> > > Since Rob has acked the SP805 WDT binding documentation patch (patch
>> > > 1/2 of this series),
>> > > can this DTSI change, please be considered for absorption in the arm-
>> > soc tree.
>> >
>> > Sure, please submit it for inclusion. Who is the maintainer for
>> > arch/arm64/boot/dts/freescale/ ? Can they pick up all the freescale
>> > related dts changes and submit them as a pull request? Should they go
>> > through Shawn's tree maybe?
>>
>> Thanks Arnd. For now, may-be I can send this patchset with Rob's Acked-by added
>> for 1/2 to 'arm@kernel.org'. So that this can be picked by via the arm-soc tree.
>> Shawn, I hope it's ok with you.
>
> Yeah.  I'm maintaining a git tree, collecting all Freescale arm32
> platform patches, and sending them to arm-soc for each merge window.
> If I can be copied on those arm64 patches, I do not mind handling them
> together with arm32 ones.

Thanks Shawn. Sure, I will make sure to remember the same for future
arm64 patches.

Regards,
Bhupesh
Li Yang-R58472 Jan. 12, 2016, 2:17 p.m. UTC | #6
On Fri, Dec 25, 2015 at 9:56 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Thu, Dec 24, 2015 at 08:41:54PM +0000, Sharma Bhupesh wrote:
>>
>>
>> > -----Original Message-----
>> > From: Arnd Bergmann [mailto:arnd@arndb.de]
>> > Sent: Thursday, December 24, 2015 3:49 PM
>> > To: Bhupesh SHARMA
>> > Cc: Sharma Bhupesh-B45370; Mark Rutland; linux-arm-
>> > kernel@lists.infradead.org; Olof Johansson; devicetree@vger.kernel.org;
>> > Rob Herring; Will Deacon; Catalin Marinas; Li Yang-Leo-R58472; Wood
>> > Scott-B07421; Yoder Stuart-B08248; shawn.guo@linaro.org
>> > Subject: Re: [PATCH v3 2/2] dts/ls2080a: Update DTSI to add support of
>> > SP805 WDT
>> >
>> > On Wednesday 23 December 2015, Bhupesh SHARMA wrote:
>> > >
>> > > Hi Arnd, Olof, Kevin
>> > >
>> > > On Tue, Dec 15, 2015 at 8:00 PM, Bhupesh Sharma
>> > > <bhupesh.sharma@freescale.com> wrote:
>> > > > This patch updates the LS2080a DTSI (DTS Include) file to add
>> > > > support for eight SP805 Watchdog units which can be used to reset
>> > > > the eight Cortex-A57 cores available on LS2080A.
>> > > >
>> > > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
>> > > > ---
>> > > >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   56
>> > ++++++++++++++++++++++++
>> > > >  1 file changed, 56 insertions(+)
>> > >
>> > > Since Rob has acked the SP805 WDT binding documentation patch (patch
>> > > 1/2 of this series),
>> > > can this DTSI change, please be considered for absorption in the arm-
>> > soc tree.
>> >
>> > Sure, please submit it for inclusion. Who is the maintainer for
>> > arch/arm64/boot/dts/freescale/ ? Can they pick up all the freescale
>> > related dts changes and submit them as a pull request? Should they go
>> > through Shawn's tree maybe?
>>
>> Thanks Arnd. For now, may-be I can send this patchset with Rob's Acked-by added
>> for 1/2 to 'arm@kernel.org'. So that this can be picked by via the arm-soc tree.
>> Shawn, I hope it's ok with you.
>
> Yeah.  I'm maintaining a git tree, collecting all Freescale arm32
> platform patches, and sending them to arm-soc for each merge window.
> If I can be copied on those arm64 patches, I do not mind handling them
> together with arm32 ones.

Shawn,  Thanks a lot for offering to help.

Sorry for a very delayed response as I was on vacation.  I have
recently been made responsible by the company to push and track the
upstreaming of all armv8 related software within the Digital
Networking group of FSL/NXP which is currently the only business unit
to use ARMv8 cores.  We also agreed in an internal discussion that it
will be good for me to also help organize patches for upstream
acceptance.  I think I can help to make it more effective in
communicating community requirements and feedback to all related
developers and their management.  And I can also help to enable the
internal test team to better test the staging patches before they hit
the mainline.

Regards,
Leo
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index e81cd48..7b0f411 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -193,6 +193,62 @@ 
 			interrupts = <0 32 0x4>; /* Level high type */
 		};
 
+		cluster1_core0_watchdog: wdt@c000000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc000000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
+		cluster1_core1_watchdog: wdt@c010000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc010000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
+		cluster2_core0_watchdog: wdt@c100000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc100000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
+		cluster2_core1_watchdog: wdt@c110000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc110000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
+		cluster3_core0_watchdog: wdt@c200000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc200000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
+		cluster3_core1_watchdog: wdt@c210000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc210000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
+		cluster4_core0_watchdog: wdt@c300000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc300000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
+		cluster4_core1_watchdog: wdt@c310000 {
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			reg = <0x0 0xc310000 0x0 0x1000>;
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "apb_pclk", "wdog_clk";
+		};
+
 		fsl_mc: fsl-mc@80c000000 {
 			compatible = "fsl,qoriq-mc";
 			reg = <0x00000008 0x0c000000 0 0x40>,	 /* MC portal base */