| Message ID | 1305038132-5080-3-git-send-email-joerg.roedel@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, 2011-05-10 at 16:35 +0200, Joerg Roedel wrote: > The AMD perf-counters support counting in guest or host-mode > only. Make use of that feature when user-space specified > guest/host-mode only counting. Subject mentions x86, does Intel have anything similar so you can make it work for them too? Also, might be nice to ask the power and sparc64 people if their archs can also differentiate between guest and host thingies. > diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c > index cf4e369..afc21f3 100644 > --- a/arch/x86/kernel/cpu/perf_event_amd.c > +++ b/arch/x86/kernel/cpu/perf_event_amd.c > @@ -116,6 +116,12 @@ static int amd_pmu_hw_config(struct perf_event *event) > if (ret) > return ret; > > + if (event->attr.exclude_host) > + event->hw.config |= AMD_PERFMON_EVENTSEL_GUESTONLY; > + > + if (event->attr.exclude_guest) > + event->hw.config |= AMD_PERFMON_EVENTSEL_HOSTONLY; > + > if (event->attr.type != PERF_TYPE_RAW) > return 0; -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, May 10, 2011 at 10:48:20AM -0400, Peter Zijlstra wrote: > On Tue, 2011-05-10 at 16:35 +0200, Joerg Roedel wrote: > > The AMD perf-counters support counting in guest or host-mode > > only. Make use of that feature when user-space specified > > guest/host-mode only counting. > > Subject mentions x86, does Intel have anything similar so you can make > it work for them too? Intel does not support guest or host-only counting in the hardware (at least according to my documentation). If wanted it could be approximated by enabling/disabling the counters in the guest-entry path. So subject should better say "perf, amd", right? > Also, might be nice to ask the power and sparc64 people if their archs > can also differentiate between guest and host thingies. Right, I don't know if their hardware has similar features. I'll try to find this out. Joerg -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 05/10/2011 06:04 PM, Roedel, Joerg wrote: > On Tue, May 10, 2011 at 10:48:20AM -0400, Peter Zijlstra wrote: > > On Tue, 2011-05-10 at 16:35 +0200, Joerg Roedel wrote: > > > The AMD perf-counters support counting in guest or host-mode > > > only. Make use of that feature when user-space specified > > > guest/host-mode only counting. > > > > Subject mentions x86, does Intel have anything similar so you can make > > it work for them too? > > Intel does not support guest or host-only counting in the hardware (at > least according to my documentation). If wanted it could be approximated by > enabling/disabling the counters in the guest-entry path. vmx has support for atomically swapping MSRs during guest entry and exit (you can load guest MSRs on entry, save guest MSRs on exit, and load host MSRs on exit, but you can't save host MSRs on entry, so host-only counters cannot be 100% accurate). We'd need some kvm/perf hooks to program these MSR swaps, and to manually save the counters that cannot be done automatically. btw, your patchset can be further improved by integrating exclude_guest/exclude_host into the constraints. For example if we have three general purpose counters, two generic perf_events in user, one exclude_guest perf_event, and one exclude_host perf_event, we can schedule them all at all times, swapping the exclude_guest and exclude_host events during guest entry/exit.
On Wed, May 11, 2011 at 03:58:34PM +0300, Avi Kivity wrote: > On 05/10/2011 06:04 PM, Roedel, Joerg wrote: >> On Tue, May 10, 2011 at 10:48:20AM -0400, Peter Zijlstra wrote: >> > On Tue, 2011-05-10 at 16:35 +0200, Joerg Roedel wrote: >> > > The AMD perf-counters support counting in guest or host-mode >> > > only. Make use of that feature when user-space specified >> > > guest/host-mode only counting. >> > >> > Subject mentions x86, does Intel have anything similar so you can make >> > it work for them too? >> >> Intel does not support guest or host-only counting in the hardware (at >> least according to my documentation). If wanted it could be approximated by >> enabling/disabling the counters in the guest-entry path. > > vmx has support for atomically swapping MSRs during guest entry and exit > (you can load guest MSRs on entry, save guest MSRs on exit, and load > host MSRs on exit, but you can't save host MSRs on entry, so host-only > counters cannot be 100% accurate). We'd need some kvm/perf hooks to > program these MSR swaps, and to manually save the counters that cannot > be done automatically. Well, wenn host counters are not saved on vmentry then we just need to save them manually (which is a one-time thing and does not need to happen at every vmentry). Thanks for that information, when I am back in office on monday I'll try to grab a machine and hopefully get this running. > btw, your patchset can be further improved by integrating > exclude_guest/exclude_host into the constraints. For example if we have > three general purpose counters, two generic perf_events in user, one > exclude_guest perf_event, and one exclude_host perf_event, we can > schedule them all at all times, swapping the exclude_guest and > exclude_host events during guest entry/exit. Well, it will need some additional code in the amd vmrun path too. I'll take a look at it, but probably leave it as a future optimization. Thanks for the hint. Joerg -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index d9d4dae..34047c2 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -29,6 +29,9 @@ #define ARCH_PERFMON_EVENTSEL_INV (1ULL << 23) #define ARCH_PERFMON_EVENTSEL_CMASK 0xFF000000ULL +#define AMD_PERFMON_EVENTSEL_GUESTONLY (1ULL << 40) +#define AMD_PERFMON_EVENTSEL_HOSTONLY (1ULL << 41) + #define AMD64_EVENTSEL_EVENT \ (ARCH_PERFMON_EVENTSEL_EVENT | (0x0FULL << 32)) #define INTEL_ARCH_EVENT_MASK \ diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c index cf4e369..afc21f3 100644 --- a/arch/x86/kernel/cpu/perf_event_amd.c +++ b/arch/x86/kernel/cpu/perf_event_amd.c @@ -116,6 +116,12 @@ static int amd_pmu_hw_config(struct perf_event *event) if (ret) return ret; + if (event->attr.exclude_host) + event->hw.config |= AMD_PERFMON_EVENTSEL_GUESTONLY; + + if (event->attr.exclude_guest) + event->hw.config |= AMD_PERFMON_EVENTSEL_HOSTONLY; + if (event->attr.type != PERF_TYPE_RAW) return 0;
The AMD perf-counters support counting in guest or host-mode only. Make use of that feature when user-space specified guest/host-mode only counting. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> --- arch/x86/include/asm/perf_event.h | 3 +++ arch/x86/kernel/cpu/perf_event_amd.c | 6 ++++++ 2 files changed, 9 insertions(+), 0 deletions(-)