| Message ID | 1453844709-26564-1-git-send-email-jcd@tribudubois.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 26 January 2016 at 21:45, Jean-Christophe Dubois <jcd@tribudubois.net> wrote: > Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> > --- > hw/arm/Makefile.objs | 2 +- > hw/arm/sabrelite.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 94 insertions(+), 1 deletion(-) > create mode 100644 hw/arm/sabrelite.c > > diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs > index ac383df..fc1df45 100644 > --- a/hw/arm/Makefile.objs > +++ b/hw/arm/Makefile.objs > @@ -15,4 +15,4 @@ obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o > obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o xlnx-ep108.o > obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o > obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o > -obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o > +obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o > diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c > new file mode 100644 > index 0000000..4e0c3fb > --- /dev/null > +++ b/hw/arm/sabrelite.c > @@ -0,0 +1,93 @@ > +/* > + * SABRELITE Board System emulation. > + * > + * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net> > + * > + * This code is licensed under the GPL, version 2 or later. > + * See the file `COPYING' in the top level directory. > + * > + * It (partially) emulates a sabrelite board, with a Freescale > + * i.MX6 SoC > + */ > + > +#include "hw/arm/fsl-imx6.h" > +#include "hw/boards.h" > +#include "qemu/error-report.h" > +#include "exec/address-spaces.h" > +#include "net/net.h" > +#include "hw/devices.h" > +#include "hw/char/serial.h" > +#include "sysemu/qtest.h" > + > +typedef struct IMX6Sabrelite { > + FslIMX6State soc; > + MemoryRegion ram; > +} IMX6Sabrelite; > + > +static struct arm_boot_info sabrelite_binfo = { > + /* DDR memory start */ > + .loader_start = FSL_IMX6_MMDC_ADDR, > + /* No board ID, we boot from DT tree */ > + .board_id = -1, > +}; > + > +/* No need to do any particulat setup for secondary boot */ "particular" > +static void sabrelite_write_secondary(ARMCPU *cpu, > + const struct arm_boot_info *info) > +{ > +} > + > +/* Secondary cores are reseted through SRC device */ "reset" > +static void sabrelite_reset_secondary(ARMCPU *cpu, > + const struct arm_boot_info *info) > +{ > +} > + > +static void sabrelite_init(MachineState *machine) > +{ > + IMX6Sabrelite *s = g_new0(IMX6Sabrelite, 1); > + Error *err = NULL; > + > + object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX6); > + object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), > + &error_abort); > + > + object_property_set_bool(OBJECT(&s->soc), true, "realized", &err); > + if (err != NULL) { > + error_report("%s", error_get_pretty(err)); > + exit(1); > + } > + > + /* Check the amount of memory is compatible with the SOC */ > + if (machine->ram_size > FSL_IMX6_MMDC_SIZE) { > + error_report("WARNING: RAM size " RAM_ADDR_FMT " above max supported, " > + "reduced to %x", machine->ram_size, FSL_IMX6_MMDC_SIZE); > + machine->ram_size = FSL_IMX6_MMDC_SIZE; Machines should exit with an error if the user's requested RAM size can't be supported, not truncate-and-continue. > + } > + > + memory_region_allocate_system_memory(&s->ram, NULL, "sabrelite.ram", > + machine->ram_size); > + memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, > + &s->ram); > + > + sabrelite_binfo.ram_size = machine->ram_size; > + sabrelite_binfo.kernel_filename = machine->kernel_filename; > + sabrelite_binfo.kernel_cmdline = machine->kernel_cmdline; > + sabrelite_binfo.initrd_filename = machine->initrd_filename; > + sabrelite_binfo.nb_cpus = smp_cpus; > + sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary; > + sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary; > + > + if (!qtest_enabled()) { > + arm_load_kernel(&s->soc.cpu[0], &sabrelite_binfo); > + } > +} > + > +static void sabrelite_machine_init(MachineClass *mc) > +{ > + mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex A9)"; > + mc->init = sabrelite_init; > + mc->max_cpus = FSL_IMX6_NUM_CPUS; > +} > + > +DEFINE_MACHINE("sabrelite", sabrelite_machine_init) > -- > 2.5.0 thanks -- PMM
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index ac383df..fc1df45 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -15,4 +15,4 @@ obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o xlnx-ep108.o obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o -obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o +obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c new file mode 100644 index 0000000..4e0c3fb --- /dev/null +++ b/hw/arm/sabrelite.c @@ -0,0 +1,93 @@ +/* + * SABRELITE Board System emulation. + * + * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net> + * + * This code is licensed under the GPL, version 2 or later. + * See the file `COPYING' in the top level directory. + * + * It (partially) emulates a sabrelite board, with a Freescale + * i.MX6 SoC + */ + +#include "hw/arm/fsl-imx6.h" +#include "hw/boards.h" +#include "qemu/error-report.h" +#include "exec/address-spaces.h" +#include "net/net.h" +#include "hw/devices.h" +#include "hw/char/serial.h" +#include "sysemu/qtest.h" + +typedef struct IMX6Sabrelite { + FslIMX6State soc; + MemoryRegion ram; +} IMX6Sabrelite; + +static struct arm_boot_info sabrelite_binfo = { + /* DDR memory start */ + .loader_start = FSL_IMX6_MMDC_ADDR, + /* No board ID, we boot from DT tree */ + .board_id = -1, +}; + +/* No need to do any particulat setup for secondary boot */ +static void sabrelite_write_secondary(ARMCPU *cpu, + const struct arm_boot_info *info) +{ +} + +/* Secondary cores are reseted through SRC device */ +static void sabrelite_reset_secondary(ARMCPU *cpu, + const struct arm_boot_info *info) +{ +} + +static void sabrelite_init(MachineState *machine) +{ + IMX6Sabrelite *s = g_new0(IMX6Sabrelite, 1); + Error *err = NULL; + + object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX6); + object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), + &error_abort); + + object_property_set_bool(OBJECT(&s->soc), true, "realized", &err); + if (err != NULL) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + + /* Check the amount of memory is compatible with the SOC */ + if (machine->ram_size > FSL_IMX6_MMDC_SIZE) { + error_report("WARNING: RAM size " RAM_ADDR_FMT " above max supported, " + "reduced to %x", machine->ram_size, FSL_IMX6_MMDC_SIZE); + machine->ram_size = FSL_IMX6_MMDC_SIZE; + } + + memory_region_allocate_system_memory(&s->ram, NULL, "sabrelite.ram", + machine->ram_size); + memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, + &s->ram); + + sabrelite_binfo.ram_size = machine->ram_size; + sabrelite_binfo.kernel_filename = machine->kernel_filename; + sabrelite_binfo.kernel_cmdline = machine->kernel_cmdline; + sabrelite_binfo.initrd_filename = machine->initrd_filename; + sabrelite_binfo.nb_cpus = smp_cpus; + sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary; + sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary; + + if (!qtest_enabled()) { + arm_load_kernel(&s->soc.cpu[0], &sabrelite_binfo); + } +} + +static void sabrelite_machine_init(MachineClass *mc) +{ + mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex A9)"; + mc->init = sabrelite_init; + mc->max_cpus = FSL_IMX6_NUM_CPUS; +} + +DEFINE_MACHINE("sabrelite", sabrelite_machine_init)
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> --- hw/arm/Makefile.objs | 2 +- hw/arm/sabrelite.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 hw/arm/sabrelite.c