Message ID | 1454951831-11778-1-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Mon, Feb 08, 2016 at 10:47:11PM +0530, Sagar Arun Kamble wrote: > This changes ensures device is active when frequency limits are changed. > This is needed as we are writing to register RPNSWREQ in intel_set_rps. > If not done, might lead to undesired errors like: > [ 1965.189137] [drm:fw_domains_get] *ERROR* blitter: timed out waiting for forcewake ack to clear. > > v2: Added elaborate commit message. (Jani) > Fixing RPM reference drop in early exit paths. (Ville) > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_sysfs.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c > index c6188dd..2d576b7 100644 > --- a/drivers/gpu/drm/i915/i915_sysfs.c > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > @@ -370,6 +370,8 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, > > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > + intel_runtime_pm_get(dev_priv); > + > mutex_lock(&dev_priv->rps.hw_lock); > > val = intel_freq_opcode(dev_priv, val); > @@ -378,6 +380,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, > val > dev_priv->rps.max_freq || > val < dev_priv->rps.min_freq_softlimit) { > mutex_unlock(&dev_priv->rps.hw_lock); > + intel_runtime_pm_put(dev_priv); > return -EINVAL; > } > > @@ -398,6 +401,8 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, > > mutex_unlock(&dev_priv->rps.hw_lock); > > + intel_runtime_pm_put(dev_priv); > + > return count; > } > > @@ -433,6 +438,8 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > + intel_runtime_pm_get(dev_priv); > + > mutex_lock(&dev_priv->rps.hw_lock); > > val = intel_freq_opcode(dev_priv, val); > @@ -441,6 +448,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > val > dev_priv->rps.max_freq || > val > dev_priv->rps.max_freq_softlimit) { > mutex_unlock(&dev_priv->rps.hw_lock); > + intel_runtime_pm_put(dev_priv); > return -EINVAL; > } > > @@ -457,6 +465,8 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > > mutex_unlock(&dev_priv->rps.hw_lock); > > + intel_runtime_pm_put(dev_priv); > + > return count; > > } > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, Feb 08, 2016 at 07:20:11PM +0200, Ville Syrjälä wrote: > On Mon, Feb 08, 2016 at 10:47:11PM +0530, Sagar Arun Kamble wrote: > > This changes ensures device is active when frequency limits are changed. > > This is needed as we are writing to register RPNSWREQ in intel_set_rps. > > If not done, might lead to undesired errors like: > > [ 1965.189137] [drm:fw_domains_get] *ERROR* blitter: timed out waiting for forcewake ack to clear. > > > > v2: Added elaborate commit message. (Jani) > > Fixing RPM reference drop in early exit paths. (Ville) > > > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> This seems to have fallem through some crack. I went and pushed it to dinq now. Thanks for the patch. > > > --- > > drivers/gpu/drm/i915/i915_sysfs.c | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c > > index c6188dd..2d576b7 100644 > > --- a/drivers/gpu/drm/i915/i915_sysfs.c > > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > > @@ -370,6 +370,8 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, > > > > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > > > + intel_runtime_pm_get(dev_priv); > > + > > mutex_lock(&dev_priv->rps.hw_lock); > > > > val = intel_freq_opcode(dev_priv, val); > > @@ -378,6 +380,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, > > val > dev_priv->rps.max_freq || > > val < dev_priv->rps.min_freq_softlimit) { > > mutex_unlock(&dev_priv->rps.hw_lock); > > + intel_runtime_pm_put(dev_priv); > > return -EINVAL; > > } > > > > @@ -398,6 +401,8 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, > > > > mutex_unlock(&dev_priv->rps.hw_lock); > > > > + intel_runtime_pm_put(dev_priv); > > + > > return count; > > } > > > > @@ -433,6 +438,8 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > > > > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > > > + intel_runtime_pm_get(dev_priv); > > + > > mutex_lock(&dev_priv->rps.hw_lock); > > > > val = intel_freq_opcode(dev_priv, val); > > @@ -441,6 +448,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > > val > dev_priv->rps.max_freq || > > val > dev_priv->rps.max_freq_softlimit) { > > mutex_unlock(&dev_priv->rps.hw_lock); > > + intel_runtime_pm_put(dev_priv); > > return -EINVAL; > > } > > > > @@ -457,6 +465,8 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > > > > mutex_unlock(&dev_priv->rps.hw_lock); > > > > + intel_runtime_pm_put(dev_priv); > > + > > return count; > > > > } > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index c6188dd..2d576b7 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -370,6 +370,8 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, flush_delayed_work(&dev_priv->rps.delayed_resume_work); + intel_runtime_pm_get(dev_priv); + mutex_lock(&dev_priv->rps.hw_lock); val = intel_freq_opcode(dev_priv, val); @@ -378,6 +380,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, val > dev_priv->rps.max_freq || val < dev_priv->rps.min_freq_softlimit) { mutex_unlock(&dev_priv->rps.hw_lock); + intel_runtime_pm_put(dev_priv); return -EINVAL; } @@ -398,6 +401,8 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, mutex_unlock(&dev_priv->rps.hw_lock); + intel_runtime_pm_put(dev_priv); + return count; } @@ -433,6 +438,8 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, flush_delayed_work(&dev_priv->rps.delayed_resume_work); + intel_runtime_pm_get(dev_priv); + mutex_lock(&dev_priv->rps.hw_lock); val = intel_freq_opcode(dev_priv, val); @@ -441,6 +448,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, val > dev_priv->rps.max_freq || val > dev_priv->rps.max_freq_softlimit) { mutex_unlock(&dev_priv->rps.hw_lock); + intel_runtime_pm_put(dev_priv); return -EINVAL; } @@ -457,6 +465,8 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, mutex_unlock(&dev_priv->rps.hw_lock); + intel_runtime_pm_put(dev_priv); + return count; }
This changes ensures device is active when frequency limits are changed. This is needed as we are writing to register RPNSWREQ in intel_set_rps. If not done, might lead to undesired errors like: [ 1965.189137] [drm:fw_domains_get] *ERROR* blitter: timed out waiting for forcewake ack to clear. v2: Added elaborate commit message. (Jani) Fixing RPM reference drop in early exit paths. (Ville) Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> --- drivers/gpu/drm/i915/i915_sysfs.c | 10 ++++++++++ 1 file changed, 10 insertions(+)