Message ID | 52b1b554810ac3a434e3c570cade28cab3dd6b1e.1454633496.git.johnyoun@synopsys.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Am Donnerstag, 4. Februar 2016, 17:50:34 schrieb John Youn: > Fixes an issue found on rockchip rk3036-based SOC platforms. For some > reason, the existing msleep(25) is not enough after the force mode. The > following patch was reported to fix the issue. > > This does increase the probe delay again slightly, but not up to the > level it was before the original series of patches that this fixes. It > does not cause any other issues when tested on Synopsys HAPS and Altera > socfpga platforms. > > Need to revisit this series next release to see if we can address these > issues without having an unconditional delay. > > Fixes: 09c96980dc72 ("usb: dwc2: Add functions to set and clear force > mode") Reported-by: Caesar Wang <caesar.upstream@gmail.com> > Tested-by: Caesar Wang <caesar.upstream@gmail.com> > Signed-off-by: John Youn <johnyoun@synopsys.com> Tested-by: Heiko Stuebner <heiko@sntech.de> (also on a rk3036 where I hit the described problem)
Hi John, Hi Heiko, on rk3188 25 ms don’t seem to be enough also. Increasing the sleep time to 50 ms solve the problem for me while 32 ms seem to be the absolute minimum. Best regards Michael Am 13.02.2016 um 22:13 schrieb Heiko Stuebner <heiko@sntech.de>: > Am Donnerstag, 4. Februar 2016, 17:50:34 schrieb John Youn: >> Fixes an issue found on rockchip rk3036-based SOC platforms. For some >> reason, the existing msleep(25) is not enough after the force mode. The >> following patch was reported to fix the issue. >> >> This does increase the probe delay again slightly, but not up to the >> level it was before the original series of patches that this fixes. It >> does not cause any other issues when tested on Synopsys HAPS and Altera >> socfpga platforms. >> >> Need to revisit this series next release to see if we can address these >> issues without having an unconditional delay. >> >> Fixes: 09c96980dc72 ("usb: dwc2: Add functions to set and clear force >> mode") Reported-by: Caesar Wang <caesar.upstream@gmail.com> >> Tested-by: Caesar Wang <caesar.upstream@gmail.com> >> Signed-off-by: John Youn <johnyoun@synopsys.com> > > Tested-by: Heiko Stuebner <heiko@sntech.de> > (also on a rk3036 where I hit the described problem) > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip
On 2/13/2016 1:41 PM, Michael Niewoehner wrote: > Hi John, > Hi Heiko, > > on rk3188 25 ms don’t seem to be enough also. > Increasing the sleep time to 50 ms solve the problem for me while 32 ms seem to be the absolute minimum. > > Best regards > Michael > > > > Am 13.02.2016 um 22:13 schrieb Heiko Stuebner <heiko@sntech.de>: > >> Am Donnerstag, 4. Februar 2016, 17:50:34 schrieb John Youn: >>> Fixes an issue found on rockchip rk3036-based SOC platforms. For some >>> reason, the existing msleep(25) is not enough after the force mode. The >>> following patch was reported to fix the issue. >>> >>> This does increase the probe delay again slightly, but not up to the >>> level it was before the original series of patches that this fixes. It >>> does not cause any other issues when tested on Synopsys HAPS and Altera >>> socfpga platforms. >>> >>> Need to revisit this series next release to see if we can address these >>> issues without having an unconditional delay. >>> >>> Fixes: 09c96980dc72 ("usb: dwc2: Add functions to set and clear force >>> mode") Reported-by: Caesar Wang <caesar.upstream@gmail.com> >>> Tested-by: Caesar Wang <caesar.upstream@gmail.com> >>> Signed-off-by: John Youn <johnyoun@synopsys.com> >> >> Tested-by: Heiko Stuebner <heiko@sntech.de> >> (also on a rk3036 where I hit the described problem) >> >> Ok thanks Heiko and Michael. I will update the patch and resend. John
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index e991d55..627f1d2 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -619,6 +619,12 @@ void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg) __func__, hsotg->dr_mode); break; } + + /* + * NOTE: This is required for some rockchip soc based + * platforms. + */ + msleep(25); } /*