diff mbox

[i-g-t,4/4] tests/gem_scheduler: Add subtests to test batch priority behaviour

Message ID 1455269934-7586-5-git-send-email-derek.j.morton@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Derek Morton Feb. 12, 2016, 9:38 a.m. UTC
Add subtests to test each ring to check batch buffers of a higher
priority will be executed before batch buffers of a lower priority.

Signed-off-by: Derek Morton <derek.j.morton@intel.com>
---
 tests/gem_scheduler.c | 34 ++++++++++++++++++++++++++++------
 1 file changed, 28 insertions(+), 6 deletions(-)

Comments

Daniele Ceraolo Spurio Feb. 17, 2016, 1:09 p.m. UTC | #1
On 12/02/16 09:38, Derek Morton wrote:
> Add subtests to test each ring to check batch buffers of a higher
> priority will be executed before batch buffers of a lower priority.
>
> Signed-off-by: Derek Morton <derek.j.morton@intel.com>
> ---
>   tests/gem_scheduler.c | 34 ++++++++++++++++++++++++++++------
>   1 file changed, 28 insertions(+), 6 deletions(-)
>
> diff --git a/tests/gem_scheduler.c b/tests/gem_scheduler.c
> index 4824c13..febde01 100644
> --- a/tests/gem_scheduler.c
> +++ b/tests/gem_scheduler.c
> @@ -39,7 +39,8 @@
>   
>   IGT_TEST_DESCRIPTION("Check scheduler behaviour. Basic tests ensure independant "
>                        "batch buffers of the same priority are executed in "
> -                     "submission order. Read-read tests ensure "
> +                     "submission order. Priority tests ensure higher priority "
> +                     "batch buffers are executed first. Read-read tests ensure "
>                        "batch buffers with a read dependency to the same buffer "
>                        "object do not block each other. Write-write dependency "
>                        "tests ensure batch buffers with a write dependency to a "
> @@ -61,11 +62,13 @@ struct ring {
>   
>   #define NBR_RINGS (sizeof(rings)/sizeof(struct ring))
>   
> -/* Basic test. Check batch buffers of the same priority and with no dependencies
> - * are executed in the order they are submitted.
> +/* If 'priority' is set false, check batch buffers of the same priority and with
> + * no dependencies are executed in the order they are submitted.
> + * If 'priority' is set true, check batch buffers of higher priority are
> + * executed before batch buffers of lower priority.
>    */
>   #define NBR_BASIC_FDs (3)
> -static void run_test_basic(int in_flight, int ringid)
> +static void run_test_basic(int in_flight, int ringid, bool priority)
>   {
>   	int fd[NBR_BASIC_FDs];
>   	int loop;
> @@ -95,6 +98,15 @@ static void run_test_basic(int in_flight, int ringid)
>   		intel_batchbuffer_free(noop_bb);
>   	}
>   
> +	if(priority) {
> +		struct local_i915_gem_context_param param;
> +		param.context = 0; /* Default context */
> +		param.size = 0;
> +		param.param = LOCAL_CONTEXT_PARAM_PRIORITY;
> +		param.value = 1000;
> +		gem_context_set_param(fd[2], &param);

It would be nice to repeat the test lowering the priority of the default 
ctx of fd[1] instead of increasing the priority of the default ctx of 
fd[2]. Maybe we could pass the priority value instead of a bool as 
parameter in the function and have 3 possible behaviors based on the 
value (0, positive, negative)

Regards,
Daniele

> +	}
> +
>   	/* Create buffer objects */
>   	delay_bo = drm_intel_bo_alloc(bufmgr[0], "delay bo", BATCH_SZ, BATCH_SZ);
>   	igt_assert(delay_bo);
> @@ -146,7 +158,12 @@ static void run_test_basic(int in_flight, int ringid)
>   	igt_assert_f(igt_compare_timestamps(delay_buf[2], ts1_buf[0]),
>   	             "Delay ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n",
>   	             delay_buf[2], ts1_buf[0]);
> -	igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]),
> +	if(priority)
> +		igt_assert_f(igt_compare_timestamps(ts2_buf[0], ts1_buf[0]),
> +		             "TS2 ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n",
> +		             ts2_buf[0], ts1_buf[0]);
> +	else
> +		igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]),
>   	             "TS1 ts (0x%08" PRIx32 ") > TS2 ts (0x%08" PRIx32 ")\n",
>   	             ts1_buf[0], ts2_buf[0]);
>   
> @@ -393,7 +410,12 @@ igt_main
>   
>   	for (loop=0; loop < NBR_RINGS; loop++)
>   		igt_subtest_f("%s-basic", rings[loop].name) {
> -			run_test_basic(in_flight, rings[loop].id);
> +			run_test_basic(in_flight, rings[loop].id, false);
> +		}
> +
> +	for (loop=0; loop < NBR_RINGS; loop++)
> +		igt_subtest_f("%s-priority", rings[loop].name) {
> +			run_test_basic(in_flight, rings[loop].id, true);
>   		}
>   
>   	for (loop=0; loop < NBR_RINGS; loop++)
Derek Morton March 2, 2016, 9:52 a.m. UTC | #2
-----Original Message-----
From: Ceraolo Spurio, Daniele 

Sent: Wednesday, February 17, 2016 1:10 PM
To: Morton, Derek J <derek.j.morton@intel.com>; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH i-g-t 4/4] tests/gem_scheduler: Add subtests to test batch priority behaviour



On 12/02/16 09:38, Derek Morton wrote:
> Add subtests to test each ring to check batch buffers of a higher 

> priority will be executed before batch buffers of a lower priority.

>

> Signed-off-by: Derek Morton <derek.j.morton@intel.com>

> ---

>   tests/gem_scheduler.c | 34 ++++++++++++++++++++++++++++------

>   1 file changed, 28 insertions(+), 6 deletions(-)

>

> diff --git a/tests/gem_scheduler.c b/tests/gem_scheduler.c index 

> 4824c13..febde01 100644

> --- a/tests/gem_scheduler.c

> +++ b/tests/gem_scheduler.c

> @@ -39,7 +39,8 @@

>   

>   IGT_TEST_DESCRIPTION("Check scheduler behaviour. Basic tests ensure independant "

>                        "batch buffers of the same priority are executed in "

> -                     "submission order. Read-read tests ensure "

> +                     "submission order. Priority tests ensure higher priority "

> +                     "batch buffers are executed first. Read-read tests ensure "

>                        "batch buffers with a read dependency to the same buffer "

>                        "object do not block each other. Write-write dependency "

>                        "tests ensure batch buffers with a write dependency to a "

> @@ -61,11 +62,13 @@ struct ring {

>   

>   #define NBR_RINGS (sizeof(rings)/sizeof(struct ring))

>   

> -/* Basic test. Check batch buffers of the same priority and with no 

> dependencies

> - * are executed in the order they are submitted.

> +/* If 'priority' is set false, check batch buffers of the same 

> +priority and with

> + * no dependencies are executed in the order they are submitted.

> + * If 'priority' is set true, check batch buffers of higher priority 

> +are

> + * executed before batch buffers of lower priority.

>    */

>   #define NBR_BASIC_FDs (3)

> -static void run_test_basic(int in_flight, int ringid)

> +static void run_test_basic(int in_flight, int ringid, bool priority)

>   {

>   	int fd[NBR_BASIC_FDs];

>   	int loop;

> @@ -95,6 +98,15 @@ static void run_test_basic(int in_flight, int ringid)

>   		intel_batchbuffer_free(noop_bb);

>   	}

>   

> +	if(priority) {

> +		struct local_i915_gem_context_param param;

> +		param.context = 0; /* Default context */

> +		param.size = 0;

> +		param.param = LOCAL_CONTEXT_PARAM_PRIORITY;

> +		param.value = 1000;

> +		gem_context_set_param(fd[2], &param);


It would be nice to repeat the test lowering the priority of the default ctx of fd[1] instead of increasing the priority of the default ctx of fd[2]. Maybe we could pass the priority value instead of a bool as parameter in the function and have 3 possible behaviors based on the value (0, positive, negative)

I will change from a bool to an int to pass in the priority. If it is <0 apply to fd[1] instead of fd[2] and add a test to lower priority.

Regards,
Daniele

> +	}

> +

>   	/* Create buffer objects */

>   	delay_bo = drm_intel_bo_alloc(bufmgr[0], "delay bo", BATCH_SZ, BATCH_SZ);

>   	igt_assert(delay_bo);

> @@ -146,7 +158,12 @@ static void run_test_basic(int in_flight, int ringid)

>   	igt_assert_f(igt_compare_timestamps(delay_buf[2], ts1_buf[0]),

>   	             "Delay ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n",

>   	             delay_buf[2], ts1_buf[0]);

> -	igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]),

> +	if(priority)

> +		igt_assert_f(igt_compare_timestamps(ts2_buf[0], ts1_buf[0]),

> +		             "TS2 ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n",

> +		             ts2_buf[0], ts1_buf[0]);

> +	else

> +		igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]),

>   	             "TS1 ts (0x%08" PRIx32 ") > TS2 ts (0x%08" PRIx32 ")\n",

>   	             ts1_buf[0], ts2_buf[0]);

>   

> @@ -393,7 +410,12 @@ igt_main

>   

>   	for (loop=0; loop < NBR_RINGS; loop++)

>   		igt_subtest_f("%s-basic", rings[loop].name) {

> -			run_test_basic(in_flight, rings[loop].id);

> +			run_test_basic(in_flight, rings[loop].id, false);

> +		}

> +

> +	for (loop=0; loop < NBR_RINGS; loop++)

> +		igt_subtest_f("%s-priority", rings[loop].name) {

> +			run_test_basic(in_flight, rings[loop].id, true);

>   		}

>   

>   	for (loop=0; loop < NBR_RINGS; loop++)
diff mbox

Patch

diff --git a/tests/gem_scheduler.c b/tests/gem_scheduler.c
index 4824c13..febde01 100644
--- a/tests/gem_scheduler.c
+++ b/tests/gem_scheduler.c
@@ -39,7 +39,8 @@ 
 
 IGT_TEST_DESCRIPTION("Check scheduler behaviour. Basic tests ensure independant "
                      "batch buffers of the same priority are executed in "
-                     "submission order. Read-read tests ensure "
+                     "submission order. Priority tests ensure higher priority "
+                     "batch buffers are executed first. Read-read tests ensure "
                      "batch buffers with a read dependency to the same buffer "
                      "object do not block each other. Write-write dependency "
                      "tests ensure batch buffers with a write dependency to a "
@@ -61,11 +62,13 @@  struct ring {
 
 #define NBR_RINGS (sizeof(rings)/sizeof(struct ring))
 
-/* Basic test. Check batch buffers of the same priority and with no dependencies
- * are executed in the order they are submitted.
+/* If 'priority' is set false, check batch buffers of the same priority and with
+ * no dependencies are executed in the order they are submitted.
+ * If 'priority' is set true, check batch buffers of higher priority are
+ * executed before batch buffers of lower priority.
  */
 #define NBR_BASIC_FDs (3)
-static void run_test_basic(int in_flight, int ringid)
+static void run_test_basic(int in_flight, int ringid, bool priority)
 {
 	int fd[NBR_BASIC_FDs];
 	int loop;
@@ -95,6 +98,15 @@  static void run_test_basic(int in_flight, int ringid)
 		intel_batchbuffer_free(noop_bb);
 	}
 
+	if(priority) {
+		struct local_i915_gem_context_param param;
+		param.context = 0; /* Default context */
+		param.size = 0;
+		param.param = LOCAL_CONTEXT_PARAM_PRIORITY;
+		param.value = 1000;
+		gem_context_set_param(fd[2], &param);
+	}
+
 	/* Create buffer objects */
 	delay_bo = drm_intel_bo_alloc(bufmgr[0], "delay bo", BATCH_SZ, BATCH_SZ);
 	igt_assert(delay_bo);
@@ -146,7 +158,12 @@  static void run_test_basic(int in_flight, int ringid)
 	igt_assert_f(igt_compare_timestamps(delay_buf[2], ts1_buf[0]),
 	             "Delay ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n",
 	             delay_buf[2], ts1_buf[0]);
-	igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]),
+	if(priority)
+		igt_assert_f(igt_compare_timestamps(ts2_buf[0], ts1_buf[0]),
+		             "TS2 ts (0x%08" PRIx32 ") > TS1 ts (0x%08" PRIx32 ")\n",
+		             ts2_buf[0], ts1_buf[0]);
+	else
+		igt_assert_f(igt_compare_timestamps(ts1_buf[0], ts2_buf[0]),
 	             "TS1 ts (0x%08" PRIx32 ") > TS2 ts (0x%08" PRIx32 ")\n",
 	             ts1_buf[0], ts2_buf[0]);
 
@@ -393,7 +410,12 @@  igt_main
 
 	for (loop=0; loop < NBR_RINGS; loop++)
 		igt_subtest_f("%s-basic", rings[loop].name) {
-			run_test_basic(in_flight, rings[loop].id);
+			run_test_basic(in_flight, rings[loop].id, false);
+		}
+
+	for (loop=0; loop < NBR_RINGS; loop++)
+		igt_subtest_f("%s-priority", rings[loop].name) {
+			run_test_basic(in_flight, rings[loop].id, true);
 		}
 
 	for (loop=0; loop < NBR_RINGS; loop++)