| Message ID | 874mcoarxq.wl%kuninori.morimoto.gx@renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
Hi Morimoto-san, Thank you for the patch. On Thursday 03 March 2016 17:25:53 Kuninori Morimoto wrote: > From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > > DMACHCLR clears each channels, but its channel number is based on > its SoC or IP. Current driver is using fixed 0x7fff (= for 15ch), > it is not good match for Gen3 or Gen2 Audio DMAC. This patch fixes it > > Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > v1 -> v2 > > - 14ch -> 15ch > > drivers/dma/sh/rcar-dmac.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c > index 57a6dfc9..02b86c6 100644 > --- a/drivers/dma/sh/rcar-dmac.c > +++ b/drivers/dma/sh/rcar-dmac.c > @@ -422,7 +422,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac) > u16 dmaor; > > /* Clear all channels and enable the DMAC globally. */ > - rcar_dmac_write(dmac, RCAR_DMACHCLR, 0x7fff); > + rcar_dmac_write(dmac, RCAR_DMACHCLR, GENMASK(dmac->n_channels - 1, 0)); > rcar_dmac_write(dmac, RCAR_DMAOR, > RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME);
On Thu, Mar 03, 2016 at 05:25:53PM +0900, Kuninori Morimoto wrote: > From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > > DMACHCLR clears each channels, but its channel number is based on > its SoC or IP. Current driver is using fixed 0x7fff (= for 15ch), > it is not good match for Gen3 or Gen2 Audio DMAC. This patch fixes it Applied, thanks
diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c index 57a6dfc9..02b86c6 100644 --- a/drivers/dma/sh/rcar-dmac.c +++ b/drivers/dma/sh/rcar-dmac.c @@ -422,7 +422,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac) u16 dmaor; /* Clear all channels and enable the DMAC globally. */ - rcar_dmac_write(dmac, RCAR_DMACHCLR, 0x7fff); + rcar_dmac_write(dmac, RCAR_DMACHCLR, GENMASK(dmac->n_channels - 1, 0)); rcar_dmac_write(dmac, RCAR_DMAOR, RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME);