| Message ID | 1457701925-15890-1-git-send-email-ramalingam.c@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Ramalingam,
[auto build test ERROR on v4.5-rc7]
[cannot apply to drm-intel/for-linux-next next-20160311]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
url: https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-BXT-Tolerance-at-BXT-DSI-pipe_config-comparison/20160311-212559
config: x86_64-allmodconfig (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All error/warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_display.c: In function 'intel_pipe_config_compare':
>> drivers/gpu/drm/i915/intel_display.c:12655:16: error: implicit declaration of function 'enc_to_intel_dsi' [-Werror=implicit-function-declaration]
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
>> drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
>> drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
>> drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
>> drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
>> drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
In file included from include/linux/list.h:8:0,
from include/linux/dmi.h:4,
from drivers/gpu/drm/i915/intel_display.c:27:
>> drivers/gpu/drm/i915/intel_display.c:12647:34: error: dereferencing pointer to incomplete type 'struct intel_dsi'
DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \
^
include/linux/kernel.h:67:30: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
>> drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
>> drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
>> drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
>> drivers/gpu/drm/i915/intel_display.c:12648:4: error: implicit declaration of function 'dsi_pixel_format_bpp' [-Werror=implicit-function-declaration]
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
>> drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
>> drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
>> drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
>> drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
>> drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12788:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
^
>> drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
>> drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12789:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
^
>> drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
>> drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12790:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
^
vim +/enc_to_intel_dsi +12655 drivers/gpu/drm/i915/intel_display.c
12641 * htotal = hactive + hfp + hsync + hbp. Here last three lements might have
12642 * the converson error, hence we consider the 3 times of error as tolerance.
12643 */
12644
12645 #define MAX_BXT_DSI_TIMING_RETRIVAL_ERR \
12646 (intel_dsi == NULL ? 0 : \
12647 DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \
12648 (dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
12649 intel_dsi->burst_mode_ratio)))
12650
12651 #define BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) { \
12652 for_each_encoder_on_crtc(dev, &crtc->base, \
12653 intel_encoder) { \
12654 if (intel_encoder->type == INTEL_OUTPUT_DSI) { \
12655 intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
12656 } \
12657 } \
12658 if (!(current_config->name < pipe_config->name && \
12659 current_config->name >= (pipe_config->name - \
12660 MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
12661 INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \
12662 "(expected %i, found %i(Err tolerance considered))\n", \
12663 current_config->name, \
12664 pipe_config->name); \
12665 ret = false; \
12666 } \
12667 }
12668
12669 #define PIPE_CONF_CHECK_I_RANGE(name) { \
12670 if (current_config->name != pipe_config->name) { \
12671 if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \
12672 BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
12673 } else { \
12674 INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \
12675 "(expected %i, found %i)\n", \
12676 current_config->name, \
12677 pipe_config->name); \
12678 ret = false; \
12679 } \
12680 } \
12681 }
12682
12683 #define PIPE_CONF_CHECK_M_N(name) \
12684 if (!intel_compare_link_m_n(¤t_config->name, \
12685 &pipe_config->name,\
12686 adjust)) { \
12687 INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \
12688 "(expected tu %i gmch %i/%i link %i/%i, " \
12689 "found tu %i, gmch %i/%i link %i/%i)\n", \
12690 current_config->name.tu, \
12691 current_config->name.gmch_m, \
12692 current_config->name.gmch_n, \
12693 current_config->name.link_m, \
12694 current_config->name.link_n, \
12695 pipe_config->name.tu, \
12696 pipe_config->name.gmch_m, \
12697 pipe_config->name.gmch_n, \
12698 pipe_config->name.link_m, \
12699 pipe_config->name.link_n); \
12700 ret = false; \
12701 }
12702
12703 #define PIPE_CONF_CHECK_M_N_ALT(name, alt_name) \
12704 if (!intel_compare_link_m_n(¤t_config->name, \
12705 &pipe_config->name, adjust) && \
12706 !intel_compare_link_m_n(¤t_config->alt_name, \
12707 &pipe_config->name, adjust)) { \
12708 INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \
12709 "(expected tu %i gmch %i/%i link %i/%i, " \
12710 "or tu %i gmch %i/%i link %i/%i, " \
12711 "found tu %i, gmch %i/%i link %i/%i)\n", \
12712 current_config->name.tu, \
12713 current_config->name.gmch_m, \
12714 current_config->name.gmch_n, \
12715 current_config->name.link_m, \
12716 current_config->name.link_n, \
12717 current_config->alt_name.tu, \
12718 current_config->alt_name.gmch_m, \
12719 current_config->alt_name.gmch_n, \
12720 current_config->alt_name.link_m, \
12721 current_config->alt_name.link_n, \
12722 pipe_config->name.tu, \
12723 pipe_config->name.gmch_m, \
12724 pipe_config->name.gmch_n, \
12725 pipe_config->name.link_m, \
12726 pipe_config->name.link_n); \
12727 ret = false; \
12728 }
12729
12730 /* This is required for BDW+ where there is only one set of registers for
12731 * switching between high and low RR.
12732 * This macro can be used whenever a comparison has to be made between one
12733 * hw state and multiple sw state variables.
12734 */
12735 #define PIPE_CONF_CHECK_I_ALT(name, alt_name) \
12736 if ((current_config->name != pipe_config->name) && \
12737 (current_config->alt_name != pipe_config->name)) { \
12738 INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \
12739 "(expected %i or %i, found %i)\n", \
12740 current_config->name, \
12741 current_config->alt_name, \
12742 pipe_config->name); \
12743 ret = false; \
12744 }
12745
12746 #define PIPE_CONF_CHECK_FLAGS(name, mask) \
12747 if ((current_config->name ^ pipe_config->name) & (mask)) { \
12748 INTEL_ERR_OR_DBG_KMS("mismatch in " #name "(" #mask ") " \
12749 "(expected %i, found %i)\n", \
12750 current_config->name & (mask), \
12751 pipe_config->name & (mask)); \
12752 ret = false; \
12753 }
12754
12755 #define PIPE_CONF_CHECK_CLOCK_FUZZY(name) \
12756 if (!intel_fuzzy_clock_check(current_config->name, pipe_config->name)) { \
12757 INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \
12758 "(expected %i, found %i)\n", \
12759 current_config->name, \
12760 pipe_config->name); \
12761 ret = false; \
12762 }
12763
12764 #define PIPE_CONF_QUIRK(quirk) \
12765 ((current_config->quirks | pipe_config->quirks) & (quirk))
12766
12767 PIPE_CONF_CHECK_I(cpu_transcoder);
12768
12769 PIPE_CONF_CHECK_I(has_pch_encoder);
12770 PIPE_CONF_CHECK_I(fdi_lanes);
12771 PIPE_CONF_CHECK_M_N(fdi_m_n);
12772
12773 PIPE_CONF_CHECK_I(has_dp_encoder);
12774 PIPE_CONF_CHECK_I(lane_count);
12775
12776 if (INTEL_INFO(dev)->gen < 8) {
12777 PIPE_CONF_CHECK_M_N(dp_m_n);
12778
12779 if (current_config->has_drrs)
12780 PIPE_CONF_CHECK_M_N(dp_m2_n2);
12781 } else
12782 PIPE_CONF_CHECK_M_N_ALT(dp_m_n, dp_m2_n2);
12783
12784 PIPE_CONF_CHECK_I(has_dsi_encoder);
12785
12786 PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
12787 PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
12788 PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
12789 PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
12790 PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi Ramalingam,
[auto build test ERROR on v4.5-rc7]
[cannot apply to drm-intel/for-linux-next next-20160311]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
url: https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-BXT-Tolerance-at-BXT-DSI-pipe_config-comparison/20160311-212559
config: x86_64-rhel (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All error/warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/intel_drv.h:32:0,
from drivers/gpu/drm/i915/intel_display.c:36:
drivers/gpu/drm/i915/intel_display.c: In function 'intel_pipe_config_compare':
>> drivers/gpu/drm/i915/i915_drv.h:2440:25: error: implicit declaration of function 'enc_to_intel_dsi' [-Werror=implicit-function-declaration]
__p = to_i915((struct drm_device *)p); \
^
>> drivers/gpu/drm/i915/i915_drv.h:2445:26: note: in expansion of macro '__I915__'
#define INTEL_INFO(p) (&__I915__(p)->info)
^
>> drivers/gpu/drm/i915/i915_drv.h:2484:27: note: in expansion of macro 'INTEL_INFO'
#define IS_BROXTON(dev) (INTEL_INFO(dev)->is_broxton)
^
>> drivers/gpu/drm/i915/intel_display.c:12671:7: note: in expansion of macro 'IS_BROXTON'
if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
In file included from include/linux/list.h:8:0,
from include/linux/dmi.h:4,
from drivers/gpu/drm/i915/intel_display.c:27:
>> drivers/gpu/drm/i915/intel_display.c:12647:34: error: dereferencing pointer to incomplete type
DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \
^
include/linux/kernel.h:67:30: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
In file included from drivers/gpu/drm/i915/intel_drv.h:32:0,
from drivers/gpu/drm/i915/intel_display.c:36:
>> drivers/gpu/drm/i915/i915_drv.h:2440:25: error: implicit declaration of function 'dsi_pixel_format_bpp' [-Werror=implicit-function-declaration]
__p = to_i915((struct drm_device *)p); \
^
>> drivers/gpu/drm/i915/i915_drv.h:2445:26: note: in expansion of macro '__I915__'
#define INTEL_INFO(p) (&__I915__(p)->info)
^
>> drivers/gpu/drm/i915/i915_drv.h:2484:27: note: in expansion of macro 'INTEL_INFO'
#define IS_BROXTON(dev) (INTEL_INFO(dev)->is_broxton)
^
>> drivers/gpu/drm/i915/intel_display.c:12671:7: note: in expansion of macro 'IS_BROXTON'
if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
In file included from include/linux/list.h:8:0,
from include/linux/dmi.h:4,
from drivers/gpu/drm/i915/intel_display.c:27:
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12787:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal);
^
drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12788:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
^
In file included from include/linux/list.h:8:0,
from include/linux/dmi.h:4,
from drivers/gpu/drm/i915/intel_display.c:27:
>> drivers/gpu/drm/i915/intel_display.c:12647:34: error: dereferencing pointer to incomplete type
DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \
^
include/linux/kernel.h:67:30: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12788:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12788:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12788:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12788:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12788:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start);
^
drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12789:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
^
In file included from include/linux/list.h:8:0,
from include/linux/dmi.h:4,
from drivers/gpu/drm/i915/intel_display.c:27:
>> drivers/gpu/drm/i915/intel_display.c:12647:34: error: dereferencing pointer to incomplete type
DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \
^
include/linux/kernel.h:67:30: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12789:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12789:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12789:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12789:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12789:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end);
^
drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12790:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
^
In file included from include/linux/list.h:8:0,
from include/linux/dmi.h:4,
from drivers/gpu/drm/i915/intel_display.c:27:
>> drivers/gpu/drm/i915/intel_display.c:12647:34: error: dereferencing pointer to incomplete type
DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \
^
include/linux/kernel.h:67:30: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12790:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12790:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12790:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12790:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12790:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start);
^
drivers/gpu/drm/i915/intel_display.c:12655:14: warning: assignment makes pointer from integer without a cast
intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12791:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end);
^
In file included from include/linux/list.h:8:0,
from include/linux/dmi.h:4,
from drivers/gpu/drm/i915/intel_display.c:27:
>> drivers/gpu/drm/i915/intel_display.c:12647:34: error: dereferencing pointer to incomplete type
DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \
^
include/linux/kernel.h:67:30: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12791:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12791:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:36: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12791:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end);
^
drivers/gpu/drm/i915/intel_display.c:12648:34: error: dereferencing pointer to incomplete type
(dsi_pixel_format_bpp(intel_dsi->pixel_format) * \
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12791:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end);
^
drivers/gpu/drm/i915/intel_display.c:12649:13: error: dereferencing pointer to incomplete type
intel_dsi->burst_mode_ratio)))
^
include/linux/kernel.h:67:47: note: in definition of macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
^
drivers/gpu/drm/i915/intel_display.c:12660:4: note: in expansion of macro 'MAX_BXT_DSI_TIMING_RETRIVAL_ERR'
MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \
^
drivers/gpu/drm/i915/intel_display.c:12672:4: note: in expansion of macro 'BXT_DSI_PIPE_CONF_CHECK_I_RANGE'
BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \
^
drivers/gpu/drm/i915/intel_display.c:12791:2: note: in expansion of macro 'PIPE_CONF_CHECK_I_RANGE'
PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end);
^
cc1: some warnings being treated as errors
vim +/enc_to_intel_dsi +2440 drivers/gpu/drm/i915/i915_drv.h
dbbe9127 Chris Wilson 2014-08-09 2434 /* Note that the (struct drm_i915_private *) cast is just to shut up gcc. */
7312e2dd Chris Wilson 2014-08-13 2435 #define __I915__(p) ({ \
7312e2dd Chris Wilson 2014-08-13 2436 struct drm_i915_private *__p; \
7312e2dd Chris Wilson 2014-08-13 2437 if (__builtin_types_compatible_p(typeof(*p), struct drm_i915_private)) \
7312e2dd Chris Wilson 2014-08-13 2438 __p = (struct drm_i915_private *)p; \
7312e2dd Chris Wilson 2014-08-13 2439 else if (__builtin_types_compatible_p(typeof(*p), struct drm_device)) \
7312e2dd Chris Wilson 2014-08-13 @2440 __p = to_i915((struct drm_device *)p); \
7312e2dd Chris Wilson 2014-08-13 2441 else \
7312e2dd Chris Wilson 2014-08-13 2442 BUILD_BUG(); \
7312e2dd Chris Wilson 2014-08-13 2443 __p; \
7312e2dd Chris Wilson 2014-08-13 2444 })
dbbe9127 Chris Wilson 2014-08-09 @2445 #define INTEL_INFO(p) (&__I915__(p)->info)
87f1f465 Chris Wilson 2014-08-09 2446 #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id)
e90a21d4 Hoath, Nicholas 2015-02-05 2447 #define INTEL_REVID(p) (__I915__(p)->dev->pdev->revision)
cae5852d Zou Nan hai 2010-11-09 2448
e87a005d Jani Nikula 2015-10-20 2449 #define REVID_FOREVER 0xff
e87a005d Jani Nikula 2015-10-20 2450 /*
e87a005d Jani Nikula 2015-10-20 2451 * Return true if revision is in range [since,until] inclusive.
e87a005d Jani Nikula 2015-10-20 2452 *
e87a005d Jani Nikula 2015-10-20 2453 * Use 0 for open-ended since, and REVID_FOREVER for open-ended until.
e87a005d Jani Nikula 2015-10-20 2454 */
e87a005d Jani Nikula 2015-10-20 2455 #define IS_REVID(p, since, until) \
e87a005d Jani Nikula 2015-10-20 2456 (INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
e87a005d Jani Nikula 2015-10-20 2457
87f1f465 Chris Wilson 2014-08-09 2458 #define IS_I830(dev) (INTEL_DEVID(dev) == 0x3577)
87f1f465 Chris Wilson 2014-08-09 2459 #define IS_845G(dev) (INTEL_DEVID(dev) == 0x2562)
cae5852d Zou Nan hai 2010-11-09 2460 #define IS_I85X(dev) (INTEL_INFO(dev)->is_i85x)
87f1f465 Chris Wilson 2014-08-09 2461 #define IS_I865G(dev) (INTEL_DEVID(dev) == 0x2572)
cae5852d Zou Nan hai 2010-11-09 2462 #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g)
87f1f465 Chris Wilson 2014-08-09 2463 #define IS_I915GM(dev) (INTEL_DEVID(dev) == 0x2592)
87f1f465 Chris Wilson 2014-08-09 2464 #define IS_I945G(dev) (INTEL_DEVID(dev) == 0x2772)
cae5852d Zou Nan hai 2010-11-09 2465 #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm)
cae5852d Zou Nan hai 2010-11-09 2466 #define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater)
cae5852d Zou Nan hai 2010-11-09 2467 #define IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline)
87f1f465 Chris Wilson 2014-08-09 2468 #define IS_GM45(dev) (INTEL_DEVID(dev) == 0x2A42)
cae5852d Zou Nan hai 2010-11-09 2469 #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)
87f1f465 Chris Wilson 2014-08-09 2470 #define IS_PINEVIEW_G(dev) (INTEL_DEVID(dev) == 0xa001)
87f1f465 Chris Wilson 2014-08-09 2471 #define IS_PINEVIEW_M(dev) (INTEL_DEVID(dev) == 0xa011)
cae5852d Zou Nan hai 2010-11-09 2472 #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview)
cae5852d Zou Nan hai 2010-11-09 2473 #define IS_G33(dev) (INTEL_INFO(dev)->is_g33)
87f1f465 Chris Wilson 2014-08-09 2474 #define IS_IRONLAKE_M(dev) (INTEL_DEVID(dev) == 0x0046)
4b65177b Jesse Barnes 2011-04-28 2475 #define IS_IVYBRIDGE(dev) (INTEL_INFO(dev)->is_ivybridge)
87f1f465 Chris Wilson 2014-08-09 2476 #define IS_IVB_GT1(dev) (INTEL_DEVID(dev) == 0x0156 || \
87f1f465 Chris Wilson 2014-08-09 2477 INTEL_DEVID(dev) == 0x0152 || \
87f1f465 Chris Wilson 2014-08-09 2478 INTEL_DEVID(dev) == 0x015a)
70a3eb7a Jesse Barnes 2012-03-28 2479 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
666a4537 Wayne Boyer 2015-12-09 2480 #define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_cherryview)
4cae9ae0 Eugeni Dodonov 2012-03-29 2481 #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell)
666a4537 Wayne Boyer 2015-12-09 2482 #define IS_BROADWELL(dev) (!INTEL_INFO(dev)->is_cherryview && IS_GEN8(dev))
7201c0b3 Satheeshakrishna M 2014-04-02 2483 #define IS_SKYLAKE(dev) (INTEL_INFO(dev)->is_skylake)
7526ac19 Rodrigo Vivi 2015-10-27 @2484 #define IS_BROXTON(dev) (INTEL_INFO(dev)->is_broxton)
ef11bdb3 Rodrigo Vivi 2015-10-28 2485 #define IS_KABYLAKE(dev) (INTEL_INFO(dev)->is_kabylake)
cae5852d Zou Nan hai 2010-11-09 2486 #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
ed1c9e2c Paulo Zanoni 2013-08-12 2487 #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \
:::::: The code at line 2440 was first introduced by commit
:::::: 7312e2ddec1ffe4511a85a2814df44e79ded3c1d drm/i915: Replace __I915__ with typesafe variant
:::::: TO: Chris Wilson <chris@chris-wilson.co.uk>
:::::: CC: Daniel Vetter <daniel.vetter@ffwll.ch>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
On Fri, 11 Mar 2016, Ramalingam C <ramalingam.c@intel.com> wrote: > At BXT DSI, PIPE registers are inactive. So we can get the > PIPE's mode parameters from them. The possible option is > retriving them from the PORT registers. But mode timing > parameters are progammed to port registers interms of byteclocks. > > The formula used to convert the pixels interms of byteclk is > DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio, > 8 * 100), lane_count); > > So we retrieve them, interms of pixels as > DIV_ROUND_UP((clk_hs * lane_count * 8 * 100), > (bpp * burst_mode_ratio)); > > Due to the multiple DIV_ROUND_UP in both formulas we get the worst > case delta in the retrieved PIPE's timing parameter as below > DIV_ROUND_UP((8 * intel_dsi->lane_count * 100), > (dsi_pixel_format_bpp(intel_dsi->pixel_format) * > intel_dsi->burst_mode_ratio))) > > This converson of byteclk to pixel is required for hsync, hfp and hbp. > Which intern impacts horrizontal timing parameters. At worst case to > get htotal all there parameters are added with hactive. > Hence delta will be 3 times of above formula. Hence this value is > considered as tolerance for pipe_config comparison, in case of BXT DSI. I think you should take the encoder specific callback parts from [1], and instead of adding a new ->get_pipe_config hook, do them in ->get_hw_state, and add the rebased work from this patch on top. BR, Jani. [1] http://patchwork.freedesktop.org/patch/msgid/1456771760-18823-1-git-send-email-ramalingam.c@intel.com > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > > This change is required for > https://lists.freedesktop.org/archives/intel-gfx/2016-February/088653.html > --- > drivers/gpu/drm/i915/intel_display.c | 62 +++++++++++++++++++++++++++++++--- > 1 file changed, 57 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 7068dc1..46ce662 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -12653,6 +12653,9 @@ intel_pipe_config_compare(struct drm_device *dev, > bool adjust) > { > bool ret = true; > + struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc); > + struct intel_encoder *intel_encoder; > + struct intel_dsi *intel_dsi = NULL; > > #define INTEL_ERR_OR_DBG_KMS(fmt, ...) \ > do { \ > @@ -12680,6 +12683,54 @@ intel_pipe_config_compare(struct drm_device *dev, > ret = false; \ > } > > +/* > + * In case of BXT DSI, HW pipe_config will be retrieved from the port's timing > + * configuration. This retrival includes some errors due to the DIV_ROUND_UP. > + * So we are considering the max possible error at the comparison. > + */ > +/* > + * htotal = hactive + hfp + hsync + hbp. Here last three lements might have > + * the converson error, hence we consider the 3 times of error as tolerance. > + */ > + > +#define MAX_BXT_DSI_TIMING_RETRIVAL_ERR \ > + (intel_dsi == NULL ? 0 : \ > + DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \ > + (dsi_pixel_format_bpp(intel_dsi->pixel_format) * \ > + intel_dsi->burst_mode_ratio))) > + > +#define BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) { \ > + for_each_encoder_on_crtc(dev, &crtc->base, \ > + intel_encoder) { \ > + if (intel_encoder->type == INTEL_OUTPUT_DSI) { \ > + intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \ > + } \ > + } \ > + if (!(current_config->name < pipe_config->name && \ > + current_config->name >= (pipe_config->name - \ > + MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \ > + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ > + "(expected %i, found %i(Err tolerance considered))\n", \ > + current_config->name, \ > + pipe_config->name); \ > + ret = false; \ > + } \ > +} > + > +#define PIPE_CONF_CHECK_I_RANGE(name) { \ > + if (current_config->name != pipe_config->name) { \ > + if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \ > + BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \ > + } else { \ > + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ > + "(expected %i, found %i)\n", \ > + current_config->name, \ > + pipe_config->name); \ > + ret = false; \ > + } \ > + } \ > +} > + > #define PIPE_CONF_CHECK_M_N(name) \ > if (!intel_compare_link_m_n(¤t_config->name, \ > &pipe_config->name,\ > @@ -12784,11 +12835,11 @@ intel_pipe_config_compare(struct drm_device *dev, > PIPE_CONF_CHECK_I(has_dsi_encoder); > > PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay); > - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal); > - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start); > - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end); > - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); > - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end); > + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal); > + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start); > + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end); > + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start); > + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end); > > PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay); > PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal); > @@ -12866,6 +12917,7 @@ intel_pipe_config_compare(struct drm_device *dev, > > #undef PIPE_CONF_CHECK_X > #undef PIPE_CONF_CHECK_I > +#undef PIPE_CONF_CHECK_I_RANGE > #undef PIPE_CONF_CHECK_I_ALT > #undef PIPE_CONF_CHECK_FLAGS > #undef PIPE_CONF_CHECK_CLOCK_FUZZY
On Monday 21 March 2016 07:13 PM, Jani Nikula wrote: > On Fri, 11 Mar 2016, Ramalingam C <ramalingam.c@intel.com> wrote: >> At BXT DSI, PIPE registers are inactive. So we can get the >> PIPE's mode parameters from them. The possible option is >> retriving them from the PORT registers. But mode timing >> parameters are progammed to port registers interms of byteclocks. >> >> The formula used to convert the pixels interms of byteclk is >> DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio, >> 8 * 100), lane_count); >> >> So we retrieve them, interms of pixels as >> DIV_ROUND_UP((clk_hs * lane_count * 8 * 100), >> (bpp * burst_mode_ratio)); >> >> Due to the multiple DIV_ROUND_UP in both formulas we get the worst >> case delta in the retrieved PIPE's timing parameter as below >> DIV_ROUND_UP((8 * intel_dsi->lane_count * 100), >> (dsi_pixel_format_bpp(intel_dsi->pixel_format) * >> intel_dsi->burst_mode_ratio))) >> >> This converson of byteclk to pixel is required for hsync, hfp and hbp. >> Which intern impacts horrizontal timing parameters. At worst case to >> get htotal all there parameters are added with hactive. >> Hence delta will be 3 times of above formula. Hence this value is >> considered as tolerance for pipe_config comparison, in case of BXT DSI. > I think you should take the encoder specific callback parts from [1], > and instead of adding a new ->get_pipe_config hook, do them in > ->get_hw_state, and add the rebased work from this patch on top. > > BR, > Jani. > > [1] http://patchwork.freedesktop.org/patch/msgid/1456771760-18823-1-git-send-email-ramalingam.c@intel.com Jani, At present, encoder->get_hw_state is used for the getting the encoder's activeness(dsi port is active or not) along with the pipe it is connected to it. By definition of that encoder function declaration, I dont think we should use it for retrieving the pipe timing parameters from port. I feel adding a new encoder function is making more sense, for handling this special case of retrieving the timing parameters from port register for BXT. But If we dont want to use new encoder function I feel encoder->get_config is the option. As this is supposed to get called after display->get_pipe_config and also this function fills the pipe_config->base.adjusted_mode.crtc_clock already. Please tell me if you agree with the separate encoder function. --Ram > > >> Signed-off-by: Ramalingam C <ramalingam.c@intel.com> >> >> This change is required for >> https://lists.freedesktop.org/archives/intel-gfx/2016-February/088653.html >> --- >> drivers/gpu/drm/i915/intel_display.c | 62 +++++++++++++++++++++++++++++++--- >> 1 file changed, 57 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c >> index 7068dc1..46ce662 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -12653,6 +12653,9 @@ intel_pipe_config_compare(struct drm_device *dev, >> bool adjust) >> { >> bool ret = true; >> + struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc); >> + struct intel_encoder *intel_encoder; >> + struct intel_dsi *intel_dsi = NULL; >> >> #define INTEL_ERR_OR_DBG_KMS(fmt, ...) \ >> do { \ >> @@ -12680,6 +12683,54 @@ intel_pipe_config_compare(struct drm_device *dev, >> ret = false; \ >> } >> >> +/* >> + * In case of BXT DSI, HW pipe_config will be retrieved from the port's timing >> + * configuration. This retrival includes some errors due to the DIV_ROUND_UP. >> + * So we are considering the max possible error at the comparison. >> + */ >> +/* >> + * htotal = hactive + hfp + hsync + hbp. Here last three lements might have >> + * the converson error, hence we consider the 3 times of error as tolerance. >> + */ >> + >> +#define MAX_BXT_DSI_TIMING_RETRIVAL_ERR \ >> + (intel_dsi == NULL ? 0 : \ >> + DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \ >> + (dsi_pixel_format_bpp(intel_dsi->pixel_format) * \ >> + intel_dsi->burst_mode_ratio))) >> + >> +#define BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) { \ >> + for_each_encoder_on_crtc(dev, &crtc->base, \ >> + intel_encoder) { \ >> + if (intel_encoder->type == INTEL_OUTPUT_DSI) { \ >> + intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \ >> + } \ >> + } \ >> + if (!(current_config->name < pipe_config->name && \ >> + current_config->name >= (pipe_config->name - \ >> + MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \ >> + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ >> + "(expected %i, found %i(Err tolerance considered))\n", \ >> + current_config->name, \ >> + pipe_config->name); \ >> + ret = false; \ >> + } \ >> +} >> + >> +#define PIPE_CONF_CHECK_I_RANGE(name) { \ >> + if (current_config->name != pipe_config->name) { \ >> + if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \ >> + BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \ >> + } else { \ >> + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ >> + "(expected %i, found %i)\n", \ >> + current_config->name, \ >> + pipe_config->name); \ >> + ret = false; \ >> + } \ >> + } \ >> +} >> + >> #define PIPE_CONF_CHECK_M_N(name) \ >> if (!intel_compare_link_m_n(¤t_config->name, \ >> &pipe_config->name,\ >> @@ -12784,11 +12835,11 @@ intel_pipe_config_compare(struct drm_device *dev, >> PIPE_CONF_CHECK_I(has_dsi_encoder); >> >> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay); >> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal); >> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start); >> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end); >> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); >> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end); >> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal); >> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start); >> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end); >> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start); >> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end); >> >> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay); >> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal); >> @@ -12866,6 +12917,7 @@ intel_pipe_config_compare(struct drm_device *dev, >> >> #undef PIPE_CONF_CHECK_X >> #undef PIPE_CONF_CHECK_I >> +#undef PIPE_CONF_CHECK_I_RANGE >> #undef PIPE_CONF_CHECK_I_ALT >> #undef PIPE_CONF_CHECK_FLAGS >> #undef PIPE_CONF_CHECK_CLOCK_FUZZY
On Mon, 28 Mar 2016, Ramalingam C <ramalingam.c@intel.com> wrote: > On Monday 21 March 2016 07:13 PM, Jani Nikula wrote: >> On Fri, 11 Mar 2016, Ramalingam C <ramalingam.c@intel.com> wrote: >>> At BXT DSI, PIPE registers are inactive. So we can get the >>> PIPE's mode parameters from them. The possible option is >>> retriving them from the PORT registers. But mode timing >>> parameters are progammed to port registers interms of byteclocks. >>> >>> The formula used to convert the pixels interms of byteclk is >>> DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio, >>> 8 * 100), lane_count); >>> >>> So we retrieve them, interms of pixels as >>> DIV_ROUND_UP((clk_hs * lane_count * 8 * 100), >>> (bpp * burst_mode_ratio)); >>> >>> Due to the multiple DIV_ROUND_UP in both formulas we get the worst >>> case delta in the retrieved PIPE's timing parameter as below >>> DIV_ROUND_UP((8 * intel_dsi->lane_count * 100), >>> (dsi_pixel_format_bpp(intel_dsi->pixel_format) * >>> intel_dsi->burst_mode_ratio))) >>> >>> This converson of byteclk to pixel is required for hsync, hfp and hbp. >>> Which intern impacts horrizontal timing parameters. At worst case to >>> get htotal all there parameters are added with hactive. >>> Hence delta will be 3 times of above formula. Hence this value is >>> considered as tolerance for pipe_config comparison, in case of BXT DSI. >> I think you should take the encoder specific callback parts from [1], >> and instead of adding a new ->get_pipe_config hook, do them in >> ->get_hw_state, and add the rebased work from this patch on top. >> >> BR, >> Jani. >> >> [1] http://patchwork.freedesktop.org/patch/msgid/1456771760-18823-1-git-send-email-ramalingam.c@intel.com > > Jani, > > At present, encoder->get_hw_state is used for the getting the encoder's > activeness(dsi port is active or not) along with the pipe it is > connected to it. > By definition of that encoder function declaration, I dont think we > should use it for retrieving the pipe timing parameters from port. > > I feel adding a new encoder function is making more sense, for handling > this special case of retrieving the timing parameters > from port register for BXT. > > But If we dont want to use new encoder function I feel > encoder->get_config is the option. As this is supposed to get called after > display->get_pipe_config and also this function fills the > pipe_config->base.adjusted_mode.crtc_clock already. > > Please tell me if you agree with the separate encoder function. Please use encoder->get_config(). BR, Jani. > > --Ram > >> >> >>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com> >>> >>> This change is required for >>> https://lists.freedesktop.org/archives/intel-gfx/2016-February/088653.html >>> --- >>> drivers/gpu/drm/i915/intel_display.c | 62 +++++++++++++++++++++++++++++++--- >>> 1 file changed, 57 insertions(+), 5 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c >>> index 7068dc1..46ce662 100644 >>> --- a/drivers/gpu/drm/i915/intel_display.c >>> +++ b/drivers/gpu/drm/i915/intel_display.c >>> @@ -12653,6 +12653,9 @@ intel_pipe_config_compare(struct drm_device *dev, >>> bool adjust) >>> { >>> bool ret = true; >>> + struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc); >>> + struct intel_encoder *intel_encoder; >>> + struct intel_dsi *intel_dsi = NULL; >>> >>> #define INTEL_ERR_OR_DBG_KMS(fmt, ...) \ >>> do { \ >>> @@ -12680,6 +12683,54 @@ intel_pipe_config_compare(struct drm_device *dev, >>> ret = false; \ >>> } >>> >>> +/* >>> + * In case of BXT DSI, HW pipe_config will be retrieved from the port's timing >>> + * configuration. This retrival includes some errors due to the DIV_ROUND_UP. >>> + * So we are considering the max possible error at the comparison. >>> + */ >>> +/* >>> + * htotal = hactive + hfp + hsync + hbp. Here last three lements might have >>> + * the converson error, hence we consider the 3 times of error as tolerance. >>> + */ >>> + >>> +#define MAX_BXT_DSI_TIMING_RETRIVAL_ERR \ >>> + (intel_dsi == NULL ? 0 : \ >>> + DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \ >>> + (dsi_pixel_format_bpp(intel_dsi->pixel_format) * \ >>> + intel_dsi->burst_mode_ratio))) >>> + >>> +#define BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) { \ >>> + for_each_encoder_on_crtc(dev, &crtc->base, \ >>> + intel_encoder) { \ >>> + if (intel_encoder->type == INTEL_OUTPUT_DSI) { \ >>> + intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \ >>> + } \ >>> + } \ >>> + if (!(current_config->name < pipe_config->name && \ >>> + current_config->name >= (pipe_config->name - \ >>> + MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \ >>> + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ >>> + "(expected %i, found %i(Err tolerance considered))\n", \ >>> + current_config->name, \ >>> + pipe_config->name); \ >>> + ret = false; \ >>> + } \ >>> +} >>> + >>> +#define PIPE_CONF_CHECK_I_RANGE(name) { \ >>> + if (current_config->name != pipe_config->name) { \ >>> + if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \ >>> + BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \ >>> + } else { \ >>> + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ >>> + "(expected %i, found %i)\n", \ >>> + current_config->name, \ >>> + pipe_config->name); \ >>> + ret = false; \ >>> + } \ >>> + } \ >>> +} >>> + >>> #define PIPE_CONF_CHECK_M_N(name) \ >>> if (!intel_compare_link_m_n(¤t_config->name, \ >>> &pipe_config->name,\ >>> @@ -12784,11 +12835,11 @@ intel_pipe_config_compare(struct drm_device *dev, >>> PIPE_CONF_CHECK_I(has_dsi_encoder); >>> >>> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay); >>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal); >>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start); >>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end); >>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); >>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end); >>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal); >>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start); >>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end); >>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start); >>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end); >>> >>> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay); >>> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal); >>> @@ -12866,6 +12917,7 @@ intel_pipe_config_compare(struct drm_device *dev, >>> >>> #undef PIPE_CONF_CHECK_X >>> #undef PIPE_CONF_CHECK_I >>> +#undef PIPE_CONF_CHECK_I_RANGE >>> #undef PIPE_CONF_CHECK_I_ALT >>> #undef PIPE_CONF_CHECK_FLAGS >>> #undef PIPE_CONF_CHECK_CLOCK_FUZZY
On Tuesday 29 March 2016 01:08 PM, Jani Nikula wrote: > On Mon, 28 Mar 2016, Ramalingam C <ramalingam.c@intel.com> wrote: >> On Monday 21 March 2016 07:13 PM, Jani Nikula wrote: >>> On Fri, 11 Mar 2016, Ramalingam C <ramalingam.c@intel.com> wrote: >>>> At BXT DSI, PIPE registers are inactive. So we can get the >>>> PIPE's mode parameters from them. The possible option is >>>> retriving them from the PORT registers. But mode timing >>>> parameters are progammed to port registers interms of byteclocks. >>>> >>>> The formula used to convert the pixels interms of byteclk is >>>> DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio, >>>> 8 * 100), lane_count); >>>> >>>> So we retrieve them, interms of pixels as >>>> DIV_ROUND_UP((clk_hs * lane_count * 8 * 100), >>>> (bpp * burst_mode_ratio)); >>>> >>>> Due to the multiple DIV_ROUND_UP in both formulas we get the worst >>>> case delta in the retrieved PIPE's timing parameter as below >>>> DIV_ROUND_UP((8 * intel_dsi->lane_count * 100), >>>> (dsi_pixel_format_bpp(intel_dsi->pixel_format) * >>>> intel_dsi->burst_mode_ratio))) >>>> >>>> This converson of byteclk to pixel is required for hsync, hfp and hbp. >>>> Which intern impacts horrizontal timing parameters. At worst case to >>>> get htotal all there parameters are added with hactive. >>>> Hence delta will be 3 times of above formula. Hence this value is >>>> considered as tolerance for pipe_config comparison, in case of BXT DSI. >>> I think you should take the encoder specific callback parts from [1], >>> and instead of adding a new ->get_pipe_config hook, do them in >>> ->get_hw_state, and add the rebased work from this patch on top. >>> >>> BR, >>> Jani. >>> >>> [1] http://patchwork.freedesktop.org/patch/msgid/1456771760-18823-1-git-send-email-ramalingam.c@intel.com >> Jani, >> >> At present, encoder->get_hw_state is used for the getting the encoder's >> activeness(dsi port is active or not) along with the pipe it is >> connected to it. >> By definition of that encoder function declaration, I dont think we >> should use it for retrieving the pipe timing parameters from port. >> >> I feel adding a new encoder function is making more sense, for handling >> this special case of retrieving the timing parameters >> from port register for BXT. >> >> But If we dont want to use new encoder function I feel >> encoder->get_config is the option. As this is supposed to get called after >> display->get_pipe_config and also this function fills the >> pipe_config->base.adjusted_mode.crtc_clock already. >> >> Please tell me if you agree with the separate encoder function. > Please use encoder->get_config(). > > BR, > Jani. > Please find the change at https://lists.freedesktop.org/archives/intel-gfx/2016-March/090999.html --Ram >> --Ram >> >>> >>>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com> >>>> >>>> This change is required for >>>> https://lists.freedesktop.org/archives/intel-gfx/2016-February/088653.html >>>> --- >>>> drivers/gpu/drm/i915/intel_display.c | 62 +++++++++++++++++++++++++++++++--- >>>> 1 file changed, 57 insertions(+), 5 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c >>>> index 7068dc1..46ce662 100644 >>>> --- a/drivers/gpu/drm/i915/intel_display.c >>>> +++ b/drivers/gpu/drm/i915/intel_display.c >>>> @@ -12653,6 +12653,9 @@ intel_pipe_config_compare(struct drm_device *dev, >>>> bool adjust) >>>> { >>>> bool ret = true; >>>> + struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc); >>>> + struct intel_encoder *intel_encoder; >>>> + struct intel_dsi *intel_dsi = NULL; >>>> >>>> #define INTEL_ERR_OR_DBG_KMS(fmt, ...) \ >>>> do { \ >>>> @@ -12680,6 +12683,54 @@ intel_pipe_config_compare(struct drm_device *dev, >>>> ret = false; \ >>>> } >>>> >>>> +/* >>>> + * In case of BXT DSI, HW pipe_config will be retrieved from the port's timing >>>> + * configuration. This retrival includes some errors due to the DIV_ROUND_UP. >>>> + * So we are considering the max possible error at the comparison. >>>> + */ >>>> +/* >>>> + * htotal = hactive + hfp + hsync + hbp. Here last three lements might have >>>> + * the converson error, hence we consider the 3 times of error as tolerance. >>>> + */ >>>> + >>>> +#define MAX_BXT_DSI_TIMING_RETRIVAL_ERR \ >>>> + (intel_dsi == NULL ? 0 : \ >>>> + DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \ >>>> + (dsi_pixel_format_bpp(intel_dsi->pixel_format) * \ >>>> + intel_dsi->burst_mode_ratio))) >>>> + >>>> +#define BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) { \ >>>> + for_each_encoder_on_crtc(dev, &crtc->base, \ >>>> + intel_encoder) { \ >>>> + if (intel_encoder->type == INTEL_OUTPUT_DSI) { \ >>>> + intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \ >>>> + } \ >>>> + } \ >>>> + if (!(current_config->name < pipe_config->name && \ >>>> + current_config->name >= (pipe_config->name - \ >>>> + MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \ >>>> + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ >>>> + "(expected %i, found %i(Err tolerance considered))\n", \ >>>> + current_config->name, \ >>>> + pipe_config->name); \ >>>> + ret = false; \ >>>> + } \ >>>> +} >>>> + >>>> +#define PIPE_CONF_CHECK_I_RANGE(name) { \ >>>> + if (current_config->name != pipe_config->name) { \ >>>> + if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \ >>>> + BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \ >>>> + } else { \ >>>> + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ >>>> + "(expected %i, found %i)\n", \ >>>> + current_config->name, \ >>>> + pipe_config->name); \ >>>> + ret = false; \ >>>> + } \ >>>> + } \ >>>> +} >>>> + >>>> #define PIPE_CONF_CHECK_M_N(name) \ >>>> if (!intel_compare_link_m_n(¤t_config->name, \ >>>> &pipe_config->name,\ >>>> @@ -12784,11 +12835,11 @@ intel_pipe_config_compare(struct drm_device *dev, >>>> PIPE_CONF_CHECK_I(has_dsi_encoder); >>>> >>>> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay); >>>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal); >>>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start); >>>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end); >>>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); >>>> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end); >>>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal); >>>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start); >>>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end); >>>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start); >>>> + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end); >>>> >>>> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay); >>>> PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal); >>>> @@ -12866,6 +12917,7 @@ intel_pipe_config_compare(struct drm_device *dev, >>>> >>>> #undef PIPE_CONF_CHECK_X >>>> #undef PIPE_CONF_CHECK_I >>>> +#undef PIPE_CONF_CHECK_I_RANGE >>>> #undef PIPE_CONF_CHECK_I_ALT >>>> #undef PIPE_CONF_CHECK_FLAGS >>>> #undef PIPE_CONF_CHECK_CLOCK_FUZZY
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7068dc1..46ce662 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12653,6 +12653,9 @@ intel_pipe_config_compare(struct drm_device *dev, bool adjust) { bool ret = true; + struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc); + struct intel_encoder *intel_encoder; + struct intel_dsi *intel_dsi = NULL; #define INTEL_ERR_OR_DBG_KMS(fmt, ...) \ do { \ @@ -12680,6 +12683,54 @@ intel_pipe_config_compare(struct drm_device *dev, ret = false; \ } +/* + * In case of BXT DSI, HW pipe_config will be retrieved from the port's timing + * configuration. This retrival includes some errors due to the DIV_ROUND_UP. + * So we are considering the max possible error at the comparison. + */ +/* + * htotal = hactive + hfp + hsync + hbp. Here last three lements might have + * the converson error, hence we consider the 3 times of error as tolerance. + */ + +#define MAX_BXT_DSI_TIMING_RETRIVAL_ERR \ + (intel_dsi == NULL ? 0 : \ + DIV_ROUND_UP((3 * 8 * intel_dsi->lane_count * 100), \ + (dsi_pixel_format_bpp(intel_dsi->pixel_format) * \ + intel_dsi->burst_mode_ratio))) + +#define BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) { \ + for_each_encoder_on_crtc(dev, &crtc->base, \ + intel_encoder) { \ + if (intel_encoder->type == INTEL_OUTPUT_DSI) { \ + intel_dsi = enc_to_intel_dsi(&intel_encoder->base); \ + } \ + } \ + if (!(current_config->name < pipe_config->name && \ + current_config->name >= (pipe_config->name - \ + MAX_BXT_DSI_TIMING_RETRIVAL_ERR))) { \ + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ + "(expected %i, found %i(Err tolerance considered))\n", \ + current_config->name, \ + pipe_config->name); \ + ret = false; \ + } \ +} + +#define PIPE_CONF_CHECK_I_RANGE(name) { \ + if (current_config->name != pipe_config->name) { \ + if (IS_BROXTON(dev) && crtc->config->has_dsi_encoder) { \ + BXT_DSI_PIPE_CONF_CHECK_I_RANGE(name) \ + } else { \ + INTEL_ERR_OR_DBG_KMS("mismatch in " #name " " \ + "(expected %i, found %i)\n", \ + current_config->name, \ + pipe_config->name); \ + ret = false; \ + } \ + } \ +} + #define PIPE_CONF_CHECK_M_N(name) \ if (!intel_compare_link_m_n(¤t_config->name, \ &pipe_config->name,\ @@ -12784,11 +12835,11 @@ intel_pipe_config_compare(struct drm_device *dev, PIPE_CONF_CHECK_I(has_dsi_encoder); PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end); + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_htotal); + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_start); + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hblank_end); + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_start); + PIPE_CONF_CHECK_I_RANGE(base.adjusted_mode.crtc_hsync_end); PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay); PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal); @@ -12866,6 +12917,7 @@ intel_pipe_config_compare(struct drm_device *dev, #undef PIPE_CONF_CHECK_X #undef PIPE_CONF_CHECK_I +#undef PIPE_CONF_CHECK_I_RANGE #undef PIPE_CONF_CHECK_I_ALT #undef PIPE_CONF_CHECK_FLAGS #undef PIPE_CONF_CHECK_CLOCK_FUZZY
At BXT DSI, PIPE registers are inactive. So we can get the PIPE's mode parameters from them. The possible option is retriving them from the PORT registers. But mode timing parameters are progammed to port registers interms of byteclocks. The formula used to convert the pixels interms of byteclk is DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio, 8 * 100), lane_count); So we retrieve them, interms of pixels as DIV_ROUND_UP((clk_hs * lane_count * 8 * 100), (bpp * burst_mode_ratio)); Due to the multiple DIV_ROUND_UP in both formulas we get the worst case delta in the retrieved PIPE's timing parameter as below DIV_ROUND_UP((8 * intel_dsi->lane_count * 100), (dsi_pixel_format_bpp(intel_dsi->pixel_format) * intel_dsi->burst_mode_ratio))) This converson of byteclk to pixel is required for hsync, hfp and hbp. Which intern impacts horrizontal timing parameters. At worst case to get htotal all there parameters are added with hactive. Hence delta will be 3 times of above formula. Hence this value is considered as tolerance for pipe_config comparison, in case of BXT DSI. Signed-off-by: Ramalingam C <ramalingam.c@intel.com> This change is required for https://lists.freedesktop.org/archives/intel-gfx/2016-February/088653.html --- drivers/gpu/drm/i915/intel_display.c | 62 +++++++++++++++++++++++++++++++--- 1 file changed, 57 insertions(+), 5 deletions(-)