diff mbox

powerpc: enable 64-bit mode

Message ID 1458047717-25052-1-git-send-email-lvivier@redhat.com (mailing list archive)
State New, archived
Headers show

Commit Message

Laurent Vivier March 15, 2016, 1:15 p.m. UTC
When they are started, processors are in 32-bit mode,
as we are testing ppc64 processors, enable the 64bit mode
on starting.

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
---
 powerpc/cstart64.S | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Laurent Vivier March 15, 2016, 1:43 p.m. UTC | #1
Missing in the subject: it's a kvm-unit-tests patch.

Laurent

On 15/03/2016 14:15, Laurent Vivier wrote:
> When they are started, processors are in 32-bit mode,
> as we are testing ppc64 processors, enable the 64bit mode
> on starting.
> 
> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
> ---
>  powerpc/cstart64.S | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S
> index c87e3d6..634b854 100644
> --- a/powerpc/cstart64.S
> +++ b/powerpc/cstart64.S
> @@ -18,6 +18,15 @@
>  .globl start
>  start:
>  	FIXUP_ENDIAN
> +
> +	/* enable 64-bit mode */
> +	mfmsr	r11
> +	li	r12,-1
> +	rldicr	r12,r12,0,0
> +	or	r11,r11,r12
> +	mtmsrd	r11
> +	isync
> +
>  	/*
>  	 * We were loaded at QEMU's kernel load address, but we're not
>  	 * allowed to link there due to how QEMU deals with linker VMAs,
> 
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Thomas Huth March 15, 2016, 6:43 p.m. UTC | #2
On 15.03.2016 14:15, Laurent Vivier wrote:
> When they are started, processors are in 32-bit mode,
> as we are testing ppc64 processors, enable the 64bit mode
> on starting.
> 
> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
> ---
>  powerpc/cstart64.S | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S
> index c87e3d6..634b854 100644
> --- a/powerpc/cstart64.S
> +++ b/powerpc/cstart64.S
> @@ -18,6 +18,15 @@
>  .globl start
>  start:
>  	FIXUP_ENDIAN
> +
> +	/* enable 64-bit mode */
> +	mfmsr	r11
> +	li	r12,-1
> +	rldicr	r12,r12,0,0

Nice idea to set the highest bit, I didn't know that one yet :-)

> +	or	r11,r11,r12
> +	mtmsrd	r11
> +	isync

Looks good!

Reviewed-by: Thomas Huth <thuth@redhat.com>


PS: As far as I can see, the C code has already been compiled for 64
bits ... how did that work if it has been run in 32-bit mode so far??

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Alexander Graf March 15, 2016, 6:44 p.m. UTC | #3
On 15.03.16 19:43, Thomas Huth wrote:
> On 15.03.2016 14:15, Laurent Vivier wrote:
>> When they are started, processors are in 32-bit mode,
>> as we are testing ppc64 processors, enable the 64bit mode
>> on starting.
>>
>> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
>> ---
>>  powerpc/cstart64.S | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>>
>> diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S
>> index c87e3d6..634b854 100644
>> --- a/powerpc/cstart64.S
>> +++ b/powerpc/cstart64.S
>> @@ -18,6 +18,15 @@
>>  .globl start
>>  start:
>>  	FIXUP_ENDIAN
>> +
>> +	/* enable 64-bit mode */
>> +	mfmsr	r11
>> +	li	r12,-1
>> +	rldicr	r12,r12,0,0
> 
> Nice idea to set the highest bit, I didn't know that one yet :-)
> 
>> +	or	r11,r11,r12
>> +	mtmsrd	r11
>> +	isync
> 
> Looks good!
> 
> Reviewed-by: Thomas Huth <thuth@redhat.com>
> 
> 
> PS: As far as I can see, the C code has already been compiled for 64
> bits ... how did that work if it has been run in 32-bit mode so far??

And why would we enter a 64bit CPU without MSR_SF set?


Alex
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Thomas Huth March 15, 2016, 7:10 p.m. UTC | #4
On 15.03.2016 19:44, Alexander Graf wrote:
> 
> 
> On 15.03.16 19:43, Thomas Huth wrote:
>> On 15.03.2016 14:15, Laurent Vivier wrote:
>>> When they are started, processors are in 32-bit mode,
>>> as we are testing ppc64 processors, enable the 64bit mode
>>> on starting.
>>>
>>> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
>>> ---
>>>  powerpc/cstart64.S | 9 +++++++++
>>>  1 file changed, 9 insertions(+)
>>>
>>> diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S
>>> index c87e3d6..634b854 100644
>>> --- a/powerpc/cstart64.S
>>> +++ b/powerpc/cstart64.S
>>> @@ -18,6 +18,15 @@
>>>  .globl start
>>>  start:
>>>  	FIXUP_ENDIAN
>>> +
>>> +	/* enable 64-bit mode */
>>> +	mfmsr	r11
>>> +	li	r12,-1
>>> +	rldicr	r12,r12,0,0
>>
>> Nice idea to set the highest bit, I didn't know that one yet :-)
>>
>>> +	or	r11,r11,r12
>>> +	mtmsrd	r11
>>> +	isync
>>
>> Looks good!
>>
>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>>
>>
>> PS: As far as I can see, the C code has already been compiled for 64
>> bits ... how did that work if it has been run in 32-bit mode so far??
> 
> And why would we enter a 64bit CPU without MSR_SF set?

Ah, I see, 64-bit mode is already enabled in translate_init.c for 64-bit
CPUs! I somehow thought that 64-bit PPCs would start in 32-bit mode (for
backwards compatibility), and thus I expected that the VMs would also be
started in 32-bit mode. But seems like this is not the case... and I
learned again a new detail about PPCs :-)

 Thomas

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Laurent Vivier March 15, 2016, 8:12 p.m. UTC | #5
On 15/03/2016 19:44, Alexander Graf wrote:
> 
> 
> On 15.03.16 19:43, Thomas Huth wrote:
>> On 15.03.2016 14:15, Laurent Vivier wrote:
>>> When they are started, processors are in 32-bit mode,
>>> as we are testing ppc64 processors, enable the 64bit mode
>>> on starting.
>>>
>>> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
>>> ---
>>>  powerpc/cstart64.S | 9 +++++++++
>>>  1 file changed, 9 insertions(+)
>>>
>>> diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S
>>> index c87e3d6..634b854 100644
>>> --- a/powerpc/cstart64.S
>>> +++ b/powerpc/cstart64.S
>>> @@ -18,6 +18,15 @@
>>>  .globl start
>>>  start:
>>>  	FIXUP_ENDIAN
>>> +
>>> +	/* enable 64-bit mode */
>>> +	mfmsr	r11
>>> +	li	r12,-1
>>> +	rldicr	r12,r12,0,0
>>
>> Nice idea to set the highest bit, I didn't know that one yet :-)
>>
>>> +	or	r11,r11,r12
>>> +	mtmsrd	r11
>>> +	isync
>>
>> Looks good!
>>
>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>>
>>
>> PS: As far as I can see, the C code has already been compiled for 64
>> bits ... how did that work if it has been run in 32-bit mode so far??
> 
> And why would we enter a 64bit CPU without MSR_SF set?

I don't know, but:

When I start "qemu-system-ppc64 -machine pseries -s -S" and check the
MSR with gdb, the MSR is always set to 0 (or "info registers" in
monitor). It's why I've added this initialization.

So, perhaps there is  a bug in QEMU?

[Perhaps "env->msr |= (1ULL << MSR_SF)" is overwritten by the following
hreg_store_msr(env, msr, 1);"?]


Laurent



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Laurent Vivier March 16, 2016, 9:45 a.m. UTC | #6
On 15/03/2016 19:44, Alexander Graf wrote:
> 
> 
> On 15.03.16 19:43, Thomas Huth wrote:
>> On 15.03.2016 14:15, Laurent Vivier wrote:
>>> When they are started, processors are in 32-bit mode,
>>> as we are testing ppc64 processors, enable the 64bit mode
>>> on starting.
>>>
>>> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
>>> ---
>>>  powerpc/cstart64.S | 9 +++++++++
>>>  1 file changed, 9 insertions(+)
>>>
>>> diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S
>>> index c87e3d6..634b854 100644
>>> --- a/powerpc/cstart64.S
>>> +++ b/powerpc/cstart64.S
>>> @@ -18,6 +18,15 @@
>>>  .globl start
>>>  start:
>>>  	FIXUP_ENDIAN
>>> +
>>> +	/* enable 64-bit mode */
>>> +	mfmsr	r11
>>> +	li	r12,-1
>>> +	rldicr	r12,r12,0,0
>>
>> Nice idea to set the highest bit, I didn't know that one yet :-)
>>
>>> +	or	r11,r11,r12
>>> +	mtmsrd	r11
>>> +	isync
>>
>> Looks good!
>>
>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>>
>>
>> PS: As far as I can see, the C code has already been compiled for 64
>> bits ... how did that work if it has been run in 32-bit mode so far??
> 
> And why would we enter a 64bit CPU without MSR_SF set?

OK, it seems to be a bug in QEMU. I've sent a patch to QEMU ML trying to
fix that.

Laurent
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diff mbox

Patch

diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S
index c87e3d6..634b854 100644
--- a/powerpc/cstart64.S
+++ b/powerpc/cstart64.S
@@ -18,6 +18,15 @@ 
 .globl start
 start:
 	FIXUP_ENDIAN
+
+	/* enable 64-bit mode */
+	mfmsr	r11
+	li	r12,-1
+	rldicr	r12,r12,0,0
+	or	r11,r11,r12
+	mtmsrd	r11
+	isync
+
 	/*
 	 * We were loaded at QEMU's kernel load address, but we're not
 	 * allowed to link there due to how QEMU deals with linker VMAs,