| Message ID | 1460091646-28701-3-git-send-email-cw00.choi@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Apr 08, 2016 at 02:00:41PM +0900, Chanwoo Choi wrote: > This patch adds the detailed corrleation between sub-blocks and power line > for Exynos5422. > > Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> > --- > .../devicetree/bindings/devfreq/exynos-bus.txt | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) This belongs with your previous series. Probably, all of this should be 1 DT patch rather than piecemeal. Any division should be by h/w block, not as a driver is using features. Rob
Hi Rob, On 2016? 04? 12? 00:45, Rob Herring wrote: > On Fri, Apr 08, 2016 at 02:00:41PM +0900, Chanwoo Choi wrote: >> This patch adds the detailed corrleation between sub-blocks and power line >> for Exynos5422. >> >> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> >> --- >> .../devicetree/bindings/devfreq/exynos-bus.txt | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) > > This belongs with your previous series. Probably, all of this should be > 1 DT patch rather than piecemeal. Any division should be by h/w block, > not as a driver is using features. On previous patch-set[1] didn't support the Exynos5420 and include any information about Exynos542x SoC because Exynos5420 must need the specific device driver which is NoC (Network On Chip) Probe device. Only this patch-set support the NoC Probe device. So, I make this separate patch on this patch-set. [1] http://www.spinics.net/lists/arm-kernel/msg495976.html - [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor Best Regards, Chanwoo Choi
diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt index b098fa2ba5d4..5a37f51adacf 100644 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -104,6 +104,25 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC: |--- LCD0 |--- ISP +- In case of Exynos5422, there are two power line as following: + VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller) + |--- DREX 1 + + VDD_INT |--- NoC_Core (parent device) + |--- G2D + |--- G3D + |--- DISP1 + |--- NoC_WCORE + |--- GSCL + |--- MSCL + |--- ISP + |--- MFC + |--- GEN + |--- PERIS + |--- PERIC + |--- FSYS + |--- FSYS2 + Example1: Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to power line (regulator). The MIF (Memory Interface) AXI bus is used to
This patch adds the detailed corrleation between sub-blocks and power line for Exynos5422. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> --- .../devicetree/bindings/devfreq/exynos-bus.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)