| Message ID | 1460648177-31473-2-git-send-email-thomas.petazzoni@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
On Thu, Apr 14, 2016 at 05:36:16PM +0200, Thomas Petazzoni wrote: > This commit adds the Device Tree binding documentation that allows to > describe the PCIe controller found in Marvell Armada 7K/8K SoCs. > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> > --- > .../devicetree/bindings/pci/pci-armada8k.txt | 38 ++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt I already acked the last version, did something change? Acked-by: Rob Herring <rob@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello, On Thu, 14 Apr 2016 12:40:46 -0500, Rob Herring wrote: > I already acked the last version, did something change? From the cover letter: """ Changes since v1: - Change the DT binding to take only one clock, since in fact all PCIe lane clocks are child of the PCIe main clock, so there is no need for the PCIe controllers to take a reference to both. [...] Rob: due to the change to the DT binding (even though minimal), I have not kept your Acked-by. So if it still stands despite the DT binding change, could you send it again? Thanks! """ > Acked-by: Rob Herring <rob@kernel.org> Thanks! Thomas
On Thu, Apr 14, 2016 at 3:18 PM, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote: > Hello, > > On Thu, 14 Apr 2016 12:40:46 -0500, Rob Herring wrote: > >> I already acked the last version, did something change? > > From the cover letter: > > """ > Changes since v1: > > - Change the DT binding to take only one clock, since in fact all > PCIe lane clocks are child of the PCIe main clock, so there is no > need for the PCIe controllers to take a reference to both. Found it after I replied... > [...] > > Rob: due to the change to the DT binding (even though minimal), I have > not kept your Acked-by. So if it still stands despite the DT binding > change, could you send it again? Thanks! > """ I did, here: >> Acked-by: Rob Herring <rob@kernel.org> > > Thanks! > > Thomas > -- > Thomas Petazzoni, CTO, Free Electrons > Embedded Linux, Kernel and Android engineering > http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt new file mode 100644 index 0000000..598533a --- /dev/null +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt @@ -0,0 +1,38 @@ +* Marvell Armada 7K/8K PCIe interface + +This PCIe host controller is based on the Synopsis Designware PCIe IP +and thus inherits all the common properties defined in designware-pcie.txt. + +Required properties: +- compatible: "marvell,armada8k-pcie" +- reg: must contain two register regions + - the control register region + - the config space region +- reg-names: + - "ctrl" for the control register region + - "config" for the config space region +- interrupts: Interrupt specifier for the PCIe controler +- clocks: reference to the PCIe controller clock + +Example: + + pcie@f2600000 { + compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; + reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>; + reg-names = "ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + dma-coherent; + + bus-range = <0 0xff>; + ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */ + 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */ + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + num-lanes = <1>; + clocks = <&cpm_syscon0 1 13>; + status = "disabled"; + };
This commit adds the Device Tree binding documentation that allows to describe the PCIe controller found in Marvell Armada 7K/8K SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- .../devicetree/bindings/pci/pci-armada8k.txt | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt