| Message ID | 1464111662-15336-2-git-send-email-javier@osg.samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 05/24/2016 07:41 PM, Javier Martinez Canillas wrote: > The aclk333 clock needs to be ungated during the MFC power domain switch, > so set the clock ID to allow the Exynos power domain logic to lookup this > clock if is defined in the MFC PD device tree node. > > Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> > --- > > drivers/clk/samsung/clk-exynos5420.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Best regards, Krzysztof
On 05/24/2016 07:41 PM, Javier Martinez Canillas wrote: > The aclk333 clock needs to be ungated during the MFC power domain switch, > so set the clock ID to allow the Exynos power domain logic to lookup this > clock if is defined in the MFC PD device tree node. > > Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Thanks, patch applied.
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 92382cef9f90..469bcae5de3a 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -946,7 +946,7 @@ static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = { GATE_BUS_TOP, 13, 0, 0), GATE(0, "aclk166", "mout_user_aclk166", GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), - GATE(0, "aclk333", "mout_user_aclk333", + GATE(CLK_ACLK333, "aclk333", "mout_user_aclk333", GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), GATE(0, "aclk400_isp", "mout_user_aclk400_isp", GATE_BUS_TOP, 16, 0, 0),
The aclk333 clock needs to be ungated during the MFC power domain switch, so set the clock ID to allow the Exynos power domain logic to lookup this clock if is defined in the MFC PD device tree node. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> --- drivers/clk/samsung/clk-exynos5420.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)