| Message ID | 1464960552-6645-2-git-send-email-edgar.iglesias@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Edgar, On 03/06/16 14:29, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Add the MATTR_MEM_NC macro describing normal non-cacheable memory. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > xen/arch/arm/p2m.c | 1 + > xen/include/asm-arm/page.h | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c > index 838d004..0f1e1b1 100644 > --- a/xen/arch/arm/p2m.c > +++ b/xen/arch/arm/p2m.c > @@ -343,6 +343,7 @@ static lpae_t mfn_to_p2m_entry(unsigned long mfn, unsigned int mattr, > e.p2m.sh = LPAE_SH_INNER; > break; > > + case MATTR_MEM_NC: I would add a comment here to explain why non-cacheable memory should always be outer-shareable (see DDI 0406C.b B3-1376 to 1377). For ideas on what to write, see mfn_to_xen_entry in include/asm-arm/page.h > case MATTR_DEV: > e.p2m.sh = LPAE_SH_OUTER; > break; > diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h > index a94e978..45d2e2c 100644 > --- a/xen/include/asm-arm/page.h > +++ b/xen/include/asm-arm/page.h > @@ -73,6 +73,7 @@ > * > */ > #define MATTR_DEV 0x1 > +#define MATTR_MEM_NC 0x5 > #define MATTR_MEM 0xf > > /* Flags for get_page_from_gva, gvirt_to_maddr etc */ > Regards,
On Mon, Jun 06, 2016 at 06:23:47PM +0100, Julien Grall wrote: > Hi Edgar, > > On 03/06/16 14:29, Edgar E. Iglesias wrote: > >From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > > >Add the MATTR_MEM_NC macro describing normal non-cacheable memory. > > > >Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > >--- > > xen/arch/arm/p2m.c | 1 + > > xen/include/asm-arm/page.h | 1 + > > 2 files changed, 2 insertions(+) > > > >diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c > >index 838d004..0f1e1b1 100644 > >--- a/xen/arch/arm/p2m.c > >+++ b/xen/arch/arm/p2m.c > >@@ -343,6 +343,7 @@ static lpae_t mfn_to_p2m_entry(unsigned long mfn, unsigned int mattr, > > e.p2m.sh = LPAE_SH_INNER; > > break; > > > >+ case MATTR_MEM_NC: > > I would add a comment here to explain why non-cacheable memory should always > be outer-shareable (see DDI 0406C.b B3-1376 to 1377). > > For ideas on what to write, see mfn_to_xen_entry in include/asm-arm/page.h Thanks, I've added a comment for v3. CHeers, Edgar > > > case MATTR_DEV: > > e.p2m.sh = LPAE_SH_OUTER; > > break; > >diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h > >index a94e978..45d2e2c 100644 > >--- a/xen/include/asm-arm/page.h > >+++ b/xen/include/asm-arm/page.h > >@@ -73,6 +73,7 @@ > > * > > */ > > #define MATTR_DEV 0x1 > >+#define MATTR_MEM_NC 0x5 > > #define MATTR_MEM 0xf > > > > /* Flags for get_page_from_gva, gvirt_to_maddr etc */ > > > > Regards, > > -- > Julien Grall
diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 838d004..0f1e1b1 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -343,6 +343,7 @@ static lpae_t mfn_to_p2m_entry(unsigned long mfn, unsigned int mattr, e.p2m.sh = LPAE_SH_INNER; break; + case MATTR_MEM_NC: case MATTR_DEV: e.p2m.sh = LPAE_SH_OUTER; break; diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h index a94e978..45d2e2c 100644 --- a/xen/include/asm-arm/page.h +++ b/xen/include/asm-arm/page.h @@ -73,6 +73,7 @@ * */ #define MATTR_DEV 0x1 +#define MATTR_MEM_NC 0x5 #define MATTR_MEM 0xf /* Flags for get_page_from_gva, gvirt_to_maddr etc */