| Message ID | 1465339484-969-7-git-send-email-dianders@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Jun 07, 2016 at 03:44:39PM -0700, Douglas Anderson wrote: > Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work > with arasan,sdhci-5.1) need to know the card clock in order to function > properly. Let's expose this clock using a standard device tree > mechanism so that the PHY can get access to and query the card clock. Need to know the clock freq or need the clock? The former doesn't need to be in DT. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > index b67e623ca1ff..074d03e630ec 100644 > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > @@ -30,6 +30,12 @@ Optional Properties: > - arasan,soc-ctl-syscon: A phandle to a syscon device (see ../mfd/syscon.txt) > used to access core corecfg registers. Offsets of registers in this > syscon are determined based on the main compatible string for the device. > + - clock-output-names: If specified, this will be the name of the card clock > + which will be exposed by this device. Required if #clock-cells is > + specified. > + - #clock-cells: If specified this should be the value <0>. With this property > + in place we will export a clock representing the Card Clock. This clock > + is expected to be consumed by our PHY. You must also specify > > Example: > sdhci@e0100000 { > @@ -61,7 +67,9 @@ Example: > arasan,soc-ctl-syscon = <&grf>; > assigned-clocks = <&cru SCLK_EMMC>; > assigned-clock-rates = <200000000>; > + clock-output-names = "emmc_cardclock"; > phys = <&emmc_phy>; > phy-names = "phy_arasan"; > + #clock-cells = <0>; > status = "disabled"; > }; > -- > 2.8.0.rc3.226.g39d4020 >
Rob, On Wed, Jun 8, 2016 at 1:19 PM, Rob Herring <robh@kernel.org> wrote: > On Tue, Jun 07, 2016 at 03:44:39PM -0700, Douglas Anderson wrote: >> Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work >> with arasan,sdhci-5.1) need to know the card clock in order to function >> properly. Let's expose this clock using a standard device tree >> mechanism so that the PHY can get access to and query the card clock. > > Need to know the clock freq or need the clock? The former doesn't need > to be in DT. The PHY needs to know the card clock frequency. This clock clock frequency is known nowhere else in the system except the SDHCI driver since the SDHCI component takes its input clock and applies some dividers to get the card clock. In silicon, the SDHCI component and the PHY are separate and there is a physical clock signal going from the SDHCI component to the PHY component, so modeling this as a clock in in the device tree seems sane, doesn't it? -Doug
On Wed, Jun 08, 2016 at 01:52:20PM -0700, Doug Anderson wrote: > Rob, > > On Wed, Jun 8, 2016 at 1:19 PM, Rob Herring <robh@kernel.org> wrote: > > On Tue, Jun 07, 2016 at 03:44:39PM -0700, Douglas Anderson wrote: > >> Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work > >> with arasan,sdhci-5.1) need to know the card clock in order to function > >> properly. Let's expose this clock using a standard device tree > >> mechanism so that the PHY can get access to and query the card clock. > > > > Need to know the clock freq or need the clock? The former doesn't need > > to be in DT. > > The PHY needs to know the card clock frequency. This clock clock > frequency is known nowhere else in the system except the SDHCI driver > since the SDHCI component takes its input clock and applies some > dividers to get the card clock. In silicon, the SDHCI component and > the PHY are separate and there is a physical clock signal going from > the SDHCI component to the PHY component, so modeling this as a clock > in in the device tree seems sane, doesn't it? Yes, please just re-word it to make it clear there is a connection. With that, Acked-by: Rob Herring <robh@kernel.org>
Rob, On Fri, Jun 10, 2016 at 6:10 AM, Rob Herring <robh@kernel.org> wrote: > On Wed, Jun 08, 2016 at 01:52:20PM -0700, Doug Anderson wrote: >> Rob, >> >> On Wed, Jun 8, 2016 at 1:19 PM, Rob Herring <robh@kernel.org> wrote: >> > On Tue, Jun 07, 2016 at 03:44:39PM -0700, Douglas Anderson wrote: >> >> Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work >> >> with arasan,sdhci-5.1) need to know the card clock in order to function >> >> properly. Let's expose this clock using a standard device tree >> >> mechanism so that the PHY can get access to and query the card clock. >> > >> > Need to know the clock freq or need the clock? The former doesn't need >> > to be in DT. >> >> The PHY needs to know the card clock frequency. This clock clock >> frequency is known nowhere else in the system except the SDHCI driver >> since the SDHCI component takes its input clock and applies some >> dividers to get the card clock. In silicon, the SDHCI component and >> the PHY are separate and there is a physical clock signal going from >> the SDHCI component to the PHY component, so modeling this as a clock >> in in the device tree seems sane, doesn't it? > > Yes, please just re-word it to make it clear there is a connection. With > that, > > Acked-by: Rob Herring <robh@kernel.org> OK, done. Thanks for your review! -Doug
diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index b67e623ca1ff..074d03e630ec 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -30,6 +30,12 @@ Optional Properties: - arasan,soc-ctl-syscon: A phandle to a syscon device (see ../mfd/syscon.txt) used to access core corecfg registers. Offsets of registers in this syscon are determined based on the main compatible string for the device. + - clock-output-names: If specified, this will be the name of the card clock + which will be exposed by this device. Required if #clock-cells is + specified. + - #clock-cells: If specified this should be the value <0>. With this property + in place we will export a clock representing the Card Clock. This clock + is expected to be consumed by our PHY. You must also specify Example: sdhci@e0100000 { @@ -61,7 +67,9 @@ Example: arasan,soc-ctl-syscon = <&grf>; assigned-clocks = <&cru SCLK_EMMC>; assigned-clock-rates = <200000000>; + clock-output-names = "emmc_cardclock"; phys = <&emmc_phy>; phy-names = "phy_arasan"; + #clock-cells = <0>; status = "disabled"; };
Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work with arasan,sdhci-5.1) need to know the card clock in order to function properly. Let's expose this clock using a standard device tree mechanism so that the PHY can get access to and query the card clock. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 8 ++++++++ 1 file changed, 8 insertions(+)